參數資料
型號: P89LPC936FDH,529
廠商: NXP Semiconductors
文件頁數: 77/77頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 16K 28-TSSOP
標準包裝: 51
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,SPI,UART/USART
外圍設備: 欠壓檢測/復位,LED,POR,PWM,WDT
輸入/輸出數: 26
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 512 x 8
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
數據轉換器: A/D 8x8b; D/A 2x8b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
包裝: 管件
配用: 622-1014-ND - BOARD FOR LPC9XX TSSOP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
622-1006-ND - SOCKET ADAPTER BOARD
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
568-1758-ND - BOARD EVAL FOR LPC93X MCU FAMILY
其它名稱: 568-2012-5
935277841529
P89LPC936FDH-S
P89LPC933_934_935_936
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 8 — 12 January 2011
9 of 77
NXP Semiconductors
P89LPC933/934/935/936
8-bit microcontroller with accelerated two-clock 80C51 core
P2.0 to P2.7
I/O
Port 2: Port 2 is an 8-bit I/O port with a user-configurable output type.
During reset Port 2 latches are configured in the input only mode with the
internal pull-up disabled. The operation of Port 2 pins as inputs and
outputs depends upon the port configuration selected. Each port pin is
configured independently. Refer to Section 8.13.1 “Port configurations”
All pins have Schmitt trigger inputs.
Port 2 also provides various special functions as described below:
P2.0/ICB/
DAC0/AD03
125
I/O
P2.0 — Port 2 bit 0.
I
ICB — Input Capture B. (P89LPC935/936)
I
DAC0 — Digital-to-analog converter output.
I
AD03 — ADC0 channel 3 analog input. (P89LPC935/936)
P2.1/OCD/
AD02
226
I/O
P2.1 — Port 2 bit 1.
O
OCD — Output Compare D. (P89LPC935/936)
I
AD02 — ADC0 channel 2 analog input. (P89LPC935/936)
P2.2/MOSI
13
9
I/O
P2.2 — Port 2 bit 2.
I/O
MOSI — SPI master out slave in. When configured as master, this pin is
output; when configured as slave, this pin is input.
P2.3/MISO
14
10
I/O
P2.3 — Port 2 bit 3.
I/O
MISO — When configured as master, this pin is input, when configured as
slave, this pin is output.
P2.4/SS
15
11
I/O
P2.4 — Port 2 bit 4.
I
SS — SPI Slave select.
P2.5/
SPICLK
16
12
I/O
P2.5 — Port 2 bit 5.
I/O
SPICLK — SPI clock. When configured as master, this pin is output; when
configured as slave, this pin is input.
P2.6/OCA
27
23
I/O
P2.6 — Port 2 bit 6.
O
OCA — Output Compare A. (P89LPC935/936)
P2.7/ICA
28
24
I/O
P2.7 — Port 2 bit 7.
I
ICA — Input Capture A. (P89LPC935/936)
Table 4.
Pin description …continued
Symbol
Pin
Type
Description
TSSOP28,
PLCC28
HVQFN28
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