參數(shù)資料
型號: P89LPC935FA,129
廠商: NXP Semiconductors
文件頁數(shù): 5/77頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 28-PLCC
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 37
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 12MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LED,POR,PWM,WDT
輸入/輸出數(shù): 26
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 512 x 8
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x8b; D/A 2x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-PLCC
包裝: 管件
產(chǎn)品目錄頁面: 706 (CN2011-ZH PDF)
配用: 622-1014-ND - BOARD FOR LPC9XX TSSOP
622-1006-ND - SOCKET ADAPTER BOARD
568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
622-1002-ND - USB IN-CIRCUIT PROG LPC9XX
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
568-1758-ND - BOARD EVAL FOR LPC93X MCU FAMILY
其它名稱: 568-1287-5
935274628129
P89LPC935FA-S
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P8
9LPC
933_9
34_9
35_9
36
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Produ
ct
d
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ta
sheet
Rev
.8
12
Jan
uary
201
1
13
o
f77
N
X
P
Semi
conductor
s
P89LPC933/934/935/936
8-
bit
microc
ont
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tw
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80C5
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core
Table 5.
Special function registers - P89LPC933/934
* indicates SFRs that are bit addressable.
Name
Description
SFR
addr.
Bit functions and addresses
Reset value
MSB
LSB
Hex
Binary
Bit address
E7E6E5E4E3E2E1
E0
ACC*
Accumulator
E0H
00
0000 0000
ADCON0
A/D control register 0
8EH
----
-
ENADC0
-
00
0000 0000
ADCON1
A/D control register 1
97H
ENBI1
ENADCI
1
TMM1
EDGE1
ADCI1
ENADC1
ADCS11
ADCS10 00
0000 0000
ADINS
A/D input select
A3H
ADI13
ADI12
ADI11
ADI10
----
00
0000 0000
ADMODA
A/D mode register A
C0H
BNDI1
BURST1
SCC1
SCAN1
----
00
0000 0000
ADMODB
A/D mode register B
A1H
CLK2
CLK1
CLK0
-
ENDAC1 ENDAC0
BSA1
-
00
000x 0000
AD0DAT3
A/D_0 data register 3
F4H
00
0000 0000
AD1BH
A/D_1 boundary high register
C4H
FF
1111 1111
AD1BL
A/D_1 boundary low register
BCH
00
0000 0000
AD1DAT0
A/D_1 data register 0
D5H
00
0000 0000
AD1DAT1
A/D_1 data register 1
D6H
00
0000 0000
AD1DAT2
A/D_1 data register 2
D7H
00
0000 0000
AD1DAT3
A/D_1 data register 3
F5H
00
0000 0000
AUXR1
Auxiliary function register
A2H
CLKLP
EBRR
ENT1
ENT0
SRST
0
-
DPS
0000 00x0
Bit address
F7
F6
F5F4F3F2F1F0
B*
B register
F0H
00
0000 0000
BRGR0
Baud rate generator rate low
BEH
0000 0000
BRGR1
Baud rate generator rate high
BFH
0000 0000
BRGCON
Baud rate generator control
BDH
----
--
SBRGS
BRGEN
xxxx xx00
CMP1
Comparator 1 control register
ACH
-
CE1
CP1
CN1
OE1
CO1
CMF1
00[1]
xx00 0000
CMP2
Comparator 2 control register
ADH
-
CE2
CP2
CN2
OE2
CO2
CMF2
00[1]
xx00 0000
DIVM
CPU clock divide-by-M
control
95H
00
0000 0000
DPTR
Data pointer (2 bytes)
DPH
Data pointer high
83H
00
0000 0000
DPL
Data pointer low
82H
00
0000 0000
FMADRH
Program flash address high
E7H
00
0000 0000
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