參數(shù)資料
型號: P89LPC922
廠商: NXP Semiconductors N.V.
英文描述: MINIATURE POWER RELAY
中文描述: 8位微控制器兩個小時80C51的核心2鍵盤/ 4 KB的/ 8 KB的3伏的低功耗Flash 256 - RAM的字節(jié)數(shù)據(jù)
文件頁數(shù): 2/45頁
文件大小: 877K
代理商: P89LPC922
Philips Semiconductors
P89LPC920/921/922
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 06 — 21 November 2003
2 of 45
9397 750 12285
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
I
In-Application Programming of the Flash code memory. This allows changing the
code in a running application.
I
Serial Flash programming allows simple in-circuit production coding. Flash
security bits prevent reading of sensitive application programs.
I
Watchdog timer with separate on-chip oscillator, requiring no external
components. The watchdog prescaler is selectable from 8 values.
I
Low voltage reset (Brownout detect) allows a graceful system shutdown when
power fails. May optionally be configured as an interrupt.
I
Idle and two different Power-down reduced power modes. Improved wake-up from
Power-down mode (a low interrupt input starts execution). Typical Power-down
current is 1
μ
A (total Power-down with voltage comparators disabled).
I
Active-LOW reset. On-chip power-on reset allows operation without external reset
components. A reset counter and reset glitch suppression circuitry prevent
spurious and incomplete resets. A software reset function is also available.
I
Oscillator Fail Detect. The watchdog timer has a separate fully on-chip oscillator
allowing it to perform an oscillator fail detect function.
I
Programmable port output configuration options:
N
quasi-bidirectional,
N
open drain,
N
push-pull,
N
input-only.
I
Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value
of the pins match or do not match a programmable pattern.
I
LED drive capability (20 mA) on all port pins. A maximum limit is specified for the
entire chip.
I
Controlled slew rate port outputs to reduce EMI. Outputs have approximately
10 ns minimum ramp times.
I
Only power and ground connections are required to operate the
P89LPC920/921/922 when internal reset option is selected.
I
Four interrupt priority levels.
I
Eight keypad interrupt inputs, plus two additional external interrupt inputs.
I
Second data pointer.
I
Schmitt trigger port inputs.
I
Emulation support.
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