參數(shù)資料
型號(hào): P89LPC9221FDH,512
廠商: NXP Semiconductors
文件頁(yè)數(shù): 17/46頁(yè)
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 20-TSSOP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 75
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LED,POR,PWM,WDT
輸入/輸出數(shù): 18
程序存儲(chǔ)器容量: 8KB(8K x 8)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
包裝: 管件
配用: 622-1014-ND - BOARD FOR LPC9XX TSSOP
622-1010-ND - BOARD FOR LPC922 TSSOP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
622-1006-ND - SOCKET ADAPTER BOARD
568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
其它名稱(chēng): 568-3223-5
935278674512
P89LPC9221FDH
Philips Semiconductors
P89LPC920/921/922/9221
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 08 — 15 December 2004
24 of 46
9397 750 14469
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.16.3
Mode 2
Mode 2 congures the Timer register as an 8-bit Counter with automatic reload.
Mode 2 operation is the same for Timer 0 and Timer 1.
8.16.4
Mode 3
When Timer 1 is in Mode 3 it is stopped. Timer 0 in Mode 3 forms two separate 8-bit
counters and is provided for applications that require an extra 8-bit timer. When
Timer 1 is in Mode 3 it can still be used by the serial port as a baud rate generator.
8.16.5
Mode 6
In this mode, the corresponding timer can be changed to a PWM with a full period of
256 timer clocks.
8.16.6
Timer overow toggle output
Timers 0 and 1 can be congured to automatically toggle a port output whenever a
timer overow occurs. The same device pins that are used for the T0 and T1 count
inputs are also used for the timer toggle outputs. The port outputs will be a logic 1
prior to the rst timer overow when this mode is turned on.
8.17 Real-Time clock/system timer
The P89LPC920/921/922/9221 has a simple Real-Time clock that allows a user to
continue running an accurate timer while the rest of the device is powered-down. The
Real-Time clock can be a wake-up or an interrupt source. The Real-Time clock is a
23-bit down counter comprised of a 7-bit prescaler and a 16-bit loadable down
counter. When it reaches all ‘0’s, the counter will be reloaded again and the RTCF
ag will be set. The clock source for this counter can be either the CPU clock (CCLK)
or the XTAL oscillator, provided that the XTAL oscillator is not being used as the CPU
clock. If the XTAL oscillator is used as the CPU clock, then the RTC will use CCLK as
its clock source. Only power-on reset will reset the Real-Time clock and its
associated SFRs to the default state.
8.18 UART
The P89LPC920/921/922/9221 has an enhanced UART that is compatible with the
conventional 80C51 UART except that Timer 2 overow cannot be used as a baud
rate source. The P89LPC920/921/922/9221 does include an independent Baud Rate
Generator. The baud rate can be selected from the oscillator (divided by a constant),
Timer 1 overow, or the independent Baud Rate Generator. In addition to the baud
rate generation, enhancements over the standard 80C51 UART include Framing
Error detection, automatic address recognition, selectable double buffering and
several interrupt options.The UART can be operated in 4 modes: shift register, 8-bit
UART, 9-bit UART, and CPU clock/32 or CPU clock/16.
8.18.1
Mode 0
Serial data enters and exits through RxD. TxD outputs the shift clock. 8 bits are
transmitted or received, LSB rst. The baud rate is xed at 1
16 of the CPU clock
frequency.
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