Selection of I2<" />
參數(shù)資料
型號: P89LPC915FDH,129
廠商: NXP Semiconductors
文件頁數(shù): 3/11頁
文件大小: 0K
描述: IC 80C51 MCU FLASH 2K 14-TSSOP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 96
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LED,POR,PWM,WDT
輸入/輸出數(shù): 12
程序存儲器容量: 2KB(2K x 8)
程序存儲器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b; D/A 1x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
包裝: 管件
產(chǎn)品目錄頁面: 706 (CN2011-ZH PDF)
配用: DB-TSSOP-LPC915-ND - BOARD FOR LPC915 TSSOP
622-1014-ND - BOARD FOR LPC9XX TSSOP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
622-1006-ND - SOCKET ADAPTER BOARD
568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
622-1002-ND - USB IN-CIRCUIT PROG LPC9XX
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
其它名稱: 568-2006-5
935276205129
P89LPC915FDH-S
LC717A00AR
No.A2048-11/11
●nCS
Interface selection / Chip-select-inverting input (SPI)
Selection of I2C compatible bus mode or SPI mode is through this terminal. After initialization, the LSI is
automatically in I2C compatible bus mode. To continually use I2C compatible bus mode, fix nCS pin to “High”. To
switch to SPI mode after LSI initialization, change the nCS input “High”
→ “Low”. The nCS pin is used as the chip-
select-inverting input pin of SPI, and SPI mode is kept until LSI is again initialized.
If interface is not to be used, fix the pin to “High”.
●nRST
It is the external-reset-signal-inverting-input pin. When nRST pin is “Low”, LSI is in the reset state.
Each pin (Cin0 to 7, Cref, Pout,0 to 7, ERROR) is “Hi-Z” during reset state.
●SDA/SI
Data input and output (I2C) / Data input (SPI)
It is the data input and output pin of the I2C compatible bus or the data input pin of the SPI depending on the mode of
operation.
If interface is not to be used, fix the pin to “High”. However, even if interface is not to be used, providing a
communication terminal on board is still recommended.
●SA/SO
Slave address selection (I2C) / Data output (SPI)
It is the slave address selection pin of the I2C compatible bus or the data output pin of the SPI depending on the mode
of operation.
If interface is not to be used, fix the pin to “High”. However, even if interface is not to be used, providing a
communication terminal on board is still recommended.
PS
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