參數(shù)資料
型號: P89CV51RC2FA,512
廠商: NXP Semiconductors
文件頁數(shù): 75/76頁
文件大小: 0K
描述: IC 80C51 MCU FLASH 32K 44-PLCC
產(chǎn)品培訓模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標準包裝: 26
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: EBI/EMI,SPI,UART/USART
外圍設備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
其它名稱: 568-4254-5
935284108512
P89CV51RC2FA
P89CV51RB2_RC2_RD2_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 25 August 2009
8 of 76
NXP Semiconductors
P89CV51RB2/RC2/RD2
80C51 with 1 kB RAM, SPI
[1]
ALE loading issue: When ALE pin experiences higher loading (> 30 pF) during the reset, the microcontroller may accidentally enter into
modes other than normal working mode. The solution is to add a pull-up resistor from 3 k
to 50 k between e.g., ALE pin and V
DD.
[2]
For 6-clock mode, ALE is emitted at 1
3 of crystal frequency.
RST
10
4
I
Reset: While the oscillator is running, a HIGH logic state on this pin for two
machine cycles will reset the device.
EA
35
29
I
External Access Enable: EA must be connected to VSS in order to enable
the device to fetch code from the external program memory. EA must be
strapped to VDD for internal program execution.
ALE
33
27
I/O
Address Latch Enable: ALE is the output signal for latching the low byte of
the address during an access to external memory. Normally the ALE[1] is
emitted at a constant rate of 1
6 the crystal frequency
[2] and can be used for
external timing and clocking. One ALE pulse is skipped during each access
to external data memory. However, if bit AO is set to 1, ALE is disabled.
XTAL1
21
15
I
Crystal 1: Input to the inverting oscillator amplier and input to the internal
clock generator circuits.
XTAL2
20
14
O
Crystal 2: Output from the inverting oscillator amplier.
VDD
44
38
supply
Power supply
VSS
22
16
supply
Ground
Table 3.
P89CV51RB2/RC2/RD2 Pin description …continued
Symbol
Pin
Type
Description
PLCC44
TQFP44
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