參數(shù)資料
型號: P89C51RB2H
廠商: NXP Semiconductors N.V.
英文描述: 80C51 8-bit Flash microcontroller family 16KB/32KB/64KB ISP/IAP Flash with 512B/512B/1KB RAM
中文描述: 80C51的8位閃存微控制器系列16KB/32KB/64KB的ISP /聯(lián)合會與512B/512B/1KB內(nèi)存閃存
文件頁數(shù): 12/52頁
文件大?。?/td> 289K
代理商: P89C51RB2H
Philips Semiconductors
Preliminary specification
89C51RB2/89C51RC2/
89C51RD2
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/512B/1KB RAM
1999 Sep 23
12
Table 3.
Timer 2 Operating Modes
RCLK + TCLK
CP/RL2
TR2
MODE
0
0
1
16-bit Auto-reload
0
1
1
16-bit Capture
1
X
1
Baud rate generator
X
X
0
(off)
OSC
÷
n*
C/T2 = 0
C/T2 = 1
TR2
Control
TL2
(8-bits)
TH2
(8-bits)
TF2
RCAP2L
RCAP2H
EXEN2
Control
EXF2
Timer 2
Interrupt
T2EX Pin
Transition
Detector
T2 Pin
Capture
SU01252
* n = 6 in 6 clock mode, or 12 in 12 clock mode.
Figure 2. Timer 2 in Capture Mode
Not Bit Addressable
Symbol
Function
Not implemented, reserved for future use.*
T2OE
Timer 2 Output Enable bit.
DCEN
Down Count Enable bit. When set, this allows Timer 2 to be configured as an up/down counter.
T2OE
DCEN
SU00729
7
6
5
4
3
2
1
0
*
User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features.
In that case, the reset or inactive value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is
indeterminate.
Bit
T2MOD
Address = 0C9H
Reset Value = XXXX XX00B
Figure 3. Timer 2 Mode (T2MOD) Control Register
相關(guān)PDF資料
PDF描述
P89C51RB2HBA 80C51 8-bit Flash microcontroller family 16KB/32KB/64KB ISP/IAP Flash with 512B/512B/1KB RAM
P89C51RC2HBA 80C51 8-bit Flash microcontroller family 16KB/32KB/64KB ISP/IAP Flash with 512B/512B/1KB RAM
P89C51RD2HBA 80C51 8-bit Flash microcontroller family 16KB/32KB/64KB ISP/IAP Flash with 512B/512B/1KB RAM
P89C51RB2HBB 80C51 8-bit Flash microcontroller family 16KB/32KB/64KB ISP/IAP Flash with 512B/512B/1KB RAM
P89C51RC2HBB 80C51 8-bit Flash microcontroller family 16KB/32KB/64KB ISP/IAP Flash with 512B/512B/1KB RAM
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