參數(shù)資料
型號(hào): P87LPC764BN,112
廠商: NXP Semiconductors
文件頁(yè)數(shù): 20/60頁(yè)
文件大小: 0K
描述: IC 80C51 MCU 4K OTP 20-DIP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 18
系列: LPC700
核心處理器: 8051
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LED,POR,WDT
輸入/輸出數(shù): 18
程序存儲(chǔ)器容量: 4KB(4K x 8)
程序存儲(chǔ)器類型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 6 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 20-DIP(0.300",7.62mm)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 706 (CN2011-ZH PDF)
其它名稱: 568-1017-5
935263359112
P87LPC764BN
Philips Semiconductors
Product data
P87LPC764
Low power, low price, low pin count (20 pin)
microcontroller with 4 kbyte OTP
2003 Sep 03
26
Table 8. Sources of Wakeup from Power Down Mode
Wakeup Source
Conditions
External Interrupt 0 or 1
The corresponding interrupt must be enabled.
Keyboard Interrupt
The keyboard interrupt feature must be enabled and properly set up. The corresponding interrupt must be
enabled.
Comparator 1 or 2
The comparator(s) must be enabled and properly set up. The corresponding interrupt must be enabled.
Watchdog Timer Reset
The watchdog timer must be enabled via the WDTE bit in the UCFG1 EPROM configuration byte.
Watchdog Timer Interrupt
The WDTE bit in the UCFG1 EPROM configuration byte must not be set. The corresponding interrupt must
be enabled.
Brownout Detect Reset
The BOD bit in AUXR1 must not be set (brownout detect not disabled). The BOI bit in AUXR1 must not be
set (brownout interrupt disabled).
Brownout Detect Interrupt
The BOD bit in AUXR1 must not be set (brownout detect not disabled). The BOI bit in AUXR1 must be set
(brownout interrupt enabled). The corresponding interrupt must be enabled.
Reset Input
The external reset input must be enabled.
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