參數(shù)資料
型號: P87LPC760BDH,112
廠商: NXP Semiconductors
文件頁數(shù): 46/56頁
文件大?。?/td> 0K
描述: IC 80C51 MCU 1K OTP 14-TSSOP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 96
系列: LPC700
核心處理器: 8051
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LED,POR,WDT
輸入/輸出數(shù): 12
程序存儲器容量: 1KB(1K x 8)
程序存儲器類型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 6 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
包裝: 管件
其它名稱: 568-1015-5
935271146112
P87LPC760BDH
Philips Semiconductors
Preliminary data
P87LPC760
Low power, low price, low pin count (14 pin)
microcontroller with 1 kbyte OTP
2002 Mar 07
47
COMPARATOR ELECTRICAL CHARACTERISTICS
VDD = 3.0 V to 6.0 V unless otherwise specified; Tamb = 0 °C to +70 °C, unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIO
Offset voltage comparator inputs1
±10
mV
VCR
Common mode range comparator inputs
0
VDD–0.3
V
CMRR
Common mode rejection ratio1
–50
dB
Response time
250
500
ns
Comparator enable to output valid
10
s
IIL
Input leakage current, comparator
0 < VIN < VDD
±10
A
NOTE:
1. This parameter is guaranteed by characterization, but not tested in production.
AC ELECTRICAL CHARACTERISTICS
Tamb = 0 °C to +70 °C, VDD = 2.7 V to 6.0 V unless otherwise specified; VSS = 0 V1, 2, 3
SYMBOL
FIGURE
PARAMETER
LIMITS
UNIT
SYMBOL
FIGURE
PARAMETER
MIN
MAX
UNIT
External Clock
fC
42
Oscillator frequency (VDD = 4.0 V to 6.0 V)
0
20
MHz
fC
42
Oscillator frequency (VDD = 2.7 V to 6.0 V)
0
10
MHz
tC
42
Clock period and CPU timing cycle
1/fC
ns
fCLCX
42
Clock low-time1
fOSC = 20 MHz
20
ns
fCLCX
42
fOSC = 10 MHz
40
ns
fCHCX
42
Clock high-time1
fOSC = 20 MHz
20
ns
fCHCX
42
fOSC = 10 MHz
40
ns
Internal RC Oscillator
fCCAL
On-chip RC oscillator calibration2
fRCOSC = 6 MHz
–1
+1
%
fCTOL
On-chip RC oscillator, 0
°C to +50 °C3,4 tol.
fRCOSC = 6 MHz
–2.5
+2.5
%
fCTOL
On-chip RC oscillator, 0
°C to +70 °C3 tol.
fRCOSC = 6 MHz
–55
+2.5
%
Shift Register
tXLXL
41
Serial port clock cycle time
6tC
ns
tQVXH
41
Output data setup to clock rising edge
5tC – 133
ns
tXHQX
41
Output data hold after clock rising edge
1tC – 80
ns
tXHDV
41
Input data setup to clock rising edge
5tC – 133
ns
tXHDX
41
Input data hold after clock rising edge
0
ns
NOTES:
1. Applies only to an external clock source, not when a crystal is connected to the X1 and X2 pins.
2. Tested at VDD = 5.0 V and room temperature.
3. These parameters are characterized but not tested.
4. +/– 2.5% accuracy enables serial communication over the UART with the internal Oscillator.
5. Min frequency at hot temperature.
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