參數(shù)資料
型號： P87C770AAR
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： Microcontrollers for NTSC TVs with On-Screen Display OSD and Closed Caption CC
中文描述： 8-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PDIP52
文件頁數(shù)： 22/80頁
文件大?。?/td> 266K
代理商： P87C770AAR
1999 Jun 11
22
Philips Semiconductors
Product specification
Microcontrollers for NTSC TVs with On-Screen
Display (OSD) and Closed Caption (CC)
P8xCx70 family
11.2
Interrupt enable structure
Each interrupt source can be individually enabled or disabled by setting or clearing its associated bit in the Interrupt
Enable Registers (IEN0 and IEN1). All interrupt sources can also be globally disabled by clearing the EA bit in SFR IEN0.
The Interrupt Enable Registers are described in Sections 11.2.1 and 11.2.2.
11.2.1
I
NTERRUPT
E
NABLE
R
EGISTER
0 (IEN0)
Table 21
Interrupt Enable Register 0 (SFR address A8H)
Table 22
Description of the IEN0 bits
11.2.2
I
NTERRUPT
E
NABLE REGISTER
1 (IEN1)
Table 23
Interrupt Enable Register 1 (SFR address E8H)
Table 24
Description of the IEN1 bits
7
6
5
4
3
2
1
0
EA
ES1
ET1
EX1
ET0
EX0
BIT
SYMBOL
DESCRIPTION
7
EA
General enable/disable control.
When EA = 0, no interrupt is enabled. When EA = 1,
any individually enabled interrupt will be accepted.
This bit is not used; program to a logic 0 for future compatibility reasons.
Enable I
2
C-bus SIO interrupt.
This bit is not used; program to a logic 0 for future compatibility reasons.
Enable Timer 1 interrupt.
Enable external interrupt 1.
Enable Timer 0 interrupt.
Enable external interrupt 0.
6
5
4
3
2
1
0
ES1
ET1
EX1
ET0
EX0
7
6
5
4
3
2
1
0
ECC
EBUSY
BIT
SYMBOL
ECC
EBUSY
DESCRIPTION
7
6
5
This bit is not used; program to a logic 0 for future compatibility reasons.
Enable external interrupt 8 (CC data ready).
Enable external interrupt 7 (BUSY interrupt).
These 5 bits are not used; program to logic 0s for future compatibility reasons.
4 to 0
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