
1997 Aug 01
23
Philips Semiconductors
Product specification
8-bit microcontroller
P8xCE560
Table 17
ADC Result Register High Bits; ADRSH (address F7H)
Table 18
Description of ADRSH bits
11.8.2
ADC I
NPUT
P
ORT
S
CAN
-S
ELECT
R
EGISTER
(ADPSS)
Table 19
ADC Input Port Scan-Select Register (address E7H)
Table 20
Description of ADPSS bits
11.8.3
ADC C
ONTROL
R
EGISTER
(ADCON)
Table 21
ADC Control Register (address D7H)
Table 22
Description of ADCON bits
7
6
5
4
3
2
1
0
0
0
0
0
0
0
ADRSn.9
ADRSn.8
BIT
SYMBOL
DESCRIPTION
7 to 2
1 to 0
The upper 6 bits ADRSH.2 to ADRSH.7 are always read as a logic 0.
ADC result upper 2 bits.
ADRSn.9 to ADRSn.8
7
6
5
4
3
2
1
0
ADPSS7
ADPSS6
ADPSS5
ADPSS4
ADPSS3
ADPSS2
ADPSS1
ADPSS0
BIT
SYMBOL
DESCRIPTION
7 to 0
ADPSS7
to
ADPSS0
Control bits to select the analog input channel(s) to be scanned for
analog-to-digital conversion. If all bits ADPSS0 to ADPSS7 = 0, then no conversion can
be started. If ADPSS is written while an analog-to-digital conversion is in progress
(ADSST = 1; ADCON.3) then the autoscan loop with the previous selected analog
inputs is completed first. The next autoscan loop is performed with the new selected
analog inputs. For each individual bit position ADPSSn (n = 0 to 7):
If ADPSSn = 0, then the corresponding analog input is skipped in the autoscan loop
If ADPSSn = 1, then the corresponding analog input is included in the autoscan loop.
7
6
5
4
3
2
1
0
ADPR1
ADPR0
ADPOS
ADINT
ADSST
ADCSA
ADSRE
ADSFE
BIT
SYMBOL
DESCRIPTION
7
6
5
4
ADPR1
ADPR0
ADPOS
ADINT
These two bits determine the value of the prescaler divisor (m); see Table 23.
ADPOS is reserved for future use. Must be a logic 0 if ADCON is written.
ADC interrupt.
This flag is set when all selected analog inputs are converted (both in
continuous scan and in one-time scan mode). An interrupt is invoked if this interrupt flag
is enabled. ADINT must be cleared by software. It cannot be set by software.