參數(shù)資料
型號(hào): P83C591SFA
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Single-chip 8-bit microcontroller with CAN controller
中文描述: 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, SOT-187-2, LCC-44
文件頁數(shù): 60/161頁
文件大?。?/td> 588K
代理商: P83C591SFA
1999 Aug 19
60
Philips Semiconductors
Objective Specification
Single-chip 8-bit microcontroller with CAN controller
P8xC591
12.5.19.1 Descriptor File of the Receive Buffer
Identifier, Frame Format, Remote Transmission Request bit and Data Length Code have the same meaning as described
in the Transmit Buffer.
Fig.22 Bit Layout Receive Buffer.
7
ID.28
6
ID.27
5
ID.26
4
ID.25
3
ID.24
2
ID.23
1
ID.22
0
ID.21
7
ID.28
6
ID.27
5
ID.26
4
ID.25
3
ID.24
2
ID.23
1
ID.22
0
ID.21
Addr. 97
RX Identifier 1
Addr. 97
RX Identifier 1
Standard Frame Format (SFF)
Extended Frame Format (EFF)
7
ID.20
6
ID.19
5
ID.18
4
RTR
3
0
2
0
1
0
0
0
Addr. 98
RX Identifier 2
7
ID.20
6
ID.19
5
ID.18
4
ID.17
3
ID.16
2
ID.15
1
ID.14
0
ID.13
Addr. 98
RX Identifier 2
7
ID.12
6
ID.11
5
ID.10
4
ID.9
3
ID.8
2
ID.7
1
ID.6
0
ID.5
Addr. 99
RX Identifier 3
7
ID.4
6
ID.3
5
ID.2
4
ID.1
3
ID.0
2
RTR
1
0
0
0
Addr. 100
RX Identifier 4
Meaning of the Receive Buffer Bits:
ID.x
IDX.x
FF
RTR
DLC.x
Identifier bit x
Index bit x
Frame Format
Remote Transmission Request
Data Length Code bit x
7
FF
6
RTR
5
0
4
0
3
DLC.3
2
DLC.2
1
DLC.1
0
DLC.0
Addr. 96
RX Frame Information
7
FF
6
RTR
5
0
4
0
3
DLC.3
2
DLC.2
1
DLC.1
0
DLC.0
Addr. 96
RX Frame Information
Note:
The received Data Length Code located in the Frame
Information Byte represents the real sent Data Length
Code, which may be greater than 8 (depends on
transmitting CAN node). Nevertheless, the maximum
number of received data bytes is 8. This should be taken
into account by reading a message from the Receive
Buffer.
It depends on the data length how many CAN messages
can fit in the RXFIFO at one time. If there is not enough
space for a new message within the RXFIFO, the CAN
Controller generates a Data Overrun condition the
moment this message becomes valid and the acceptance
test was positive. A message that is partly written into the
RXFIFO, when the Data Overrun situation occurs, is
deleted. This situation is signalled to the CPU via the
Status Register and the Data Overrun Interrupt, if enabled.
It depends on the data length how many CAN messages
can fit in the RXFIFO at one time. If there is not enough
space for a new message within the RXFIFO, the CAN
Controller generates a Data Overrun condition the
moment this message becomes valid and the acceptance
test was positive. A message that is partly written into the
RXFIFO, when the Data Overrun situation occurs, is
deleted. This situation is signalled to the CPU via the
Status Register and the Data Overrun Interrupt, if enabled.
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