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參數(shù)資料
| 型號： | P80C592 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-bit microcontroller with on-chip CAN |
| 中文描述： | 8位微控制器芯片的CAN |
| 文件頁數(shù)： | 41/108頁 |
| 文件大?。?/td> | 650K |
| 代理商： | P80C592 |
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1996 Jun 27
41
Philips Semiconductors
Product specification
8-bit microcontroller with on-chip CAN
P8xC592
13.5.7
A
CCEPTANCE
C
ODE
R
EGISTER
(ACR)
The Acceptance Code Register is part of the acceptance
filter of the CAN-controller. This register can be accessed
(read/write), if the Reset Request bit is set HIGH (present).
When a message is received which passes the
acceptance test and if there is an empty Receive Buffer,
then the respective Descriptor and Data Field
(see Fig.15) are sequentially stored in this empty buffer.
In the event that there is no empty Receive Buffer, the
Data Overrun bit is set HIGH (overrun); see
Sections 13.5.5 and 13.5.6.
When the complete message has been correctly received
the following occurs:
The Receive Buffer Status bit is set HIGH (full)
If the Receive Interrupt Enable bit is set HIGH (enabled),
the Receive Interrupt is set HIGH (set).
During transmission of a message which passes the
acceptance test, the message is also written to its own
Receive Buffer. If no Receiver Buffer is available, Data
Overrun is signalled because it is not known at the start of
a message whether the CAN-controller will lose arbitration
and so become a receiver of the message.
Table 41
Acceptance Code Register (address 4)
Table 42
Description of the ACR bits
7
6
5
4
3
2
1
0
AC.7
AC.6
AC.5
AC.4
AC.3
AC.2
AC.1
AC.0
BIT
SYMBOL
FUNCTION
7
to
0
AC.7
to
AC.0
Acceptance Code.
The Acceptance Code bits (AC.7 to AC.0) and the eight most significant
bits of the message's Identifier (ID.10 to ID.3) must be equal to those bit positions which are
marked relevant by the Acceptance Mask bits (AM.7 to AM.0).
The acceptance is given, if the following equation is satisfied:
(ID10 ... ID.3) = [(AC.7 ... AC.0) or (AM.7 ... AM.0)] = 1111 1111 B.
13.5.8
A
CCEPTANCE
M
ASK
R
EGISTER
(AMR)
The Acceptance Mask Register is part of the acceptance
filter of the CAN-controller.
This register can be accessed (read/write) if the Reset
Request bit is set HIGH (present).
The Acceptance Mask Register qualifies which of the
corresponding bits of the acceptance code are ‘relevant’ or
‘don't care’ for acceptance filtering.
Table 43
Acceptance Mask Register (address 5)
Table 44
Description of the AMR bits
7
6
5
4
3
2
1
0
AM.7
AM.6
AM.5
AM.4
AM.3
AM.2
AM.1
AM.0
BIT
SYMBOL
FUNCTION
7
to
0
AM.7
to
AM.0
Acceptance Mask.
If the Acceptance Mask bit is:
HIGH (don’t care), then this bit position is ‘don’t care’ for the acceptance of a message.
LOW (relevant), then this bit position is ‘relevant’ for acceptance filtering.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| P80C592FFA | 制造商:NXP Semiconductors 功能描述: |
| P80C592FFA/00,512 | 功能描述:8位微控制器 -MCU 80C51 W/CAN 16MHZ ROMLESS RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P80C592FFA/00,512 | 制造商:NXP Semiconductors 功能描述:8BIT MCU+CAN, SMD, 80C592, PLCC68 |
| P80C592FFA/00,518 | 功能描述:8位微控制器 -MCU SINGLE-CHIP 8-BIT MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P80C592FFA/00 | 制造商:NXP Semiconductors 功能描述:8BIT MCU+CAN SMD 80C592 PLCC68 |
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