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參數(shù)資料
| 型號： | P4C1256L70PCLF |
| 廠商： | PYRAMID SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | LOW POWER 32K x 8 STATIC CMOS RAM |
| 中文描述： | 32K X 8 STANDARD SRAM, 70 ns, PDIP28 |
| 封裝： | 0.300 INCH, ROHS COMPLIANT, PLASTIC, DIP-28 |
| 文件頁數(shù)： | 5/11頁 |
| 文件大?。?/td> | 123K |
| 代理商： | P4C1256L70PCLF |
P4C1256L
Page 5 of 11
Document #
SRAM121
REV E
AC CHARACTERISTICS - WRITE CYCLE
(Over Recommended Operating Temperature & Supply Voltage)
Symbol
Parameter
-55
Max
-70
Max
Unit
Min
55
Min
70
t
WC
t
CW
t
AS
t
WP
t
AH
t
DH
t
WZ
t
OW
Write Cycle Time
ns
Chip Enable Time
to End of Write
Address Valid to
End of Write
Address Set-up
Time
50
60
ns
50
60
ns
0
0
ns
Write Pulse Width
40
50
ns
Address Hold
Time
Data Valid to End
of Write
0
0
ns
25
30
ns
Data Hold Time
0
0
ns
Write Enable to
Output in High Z
25
30
ns
Output Active from
End of Write
5
5
ns
t
AW
t
DW
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (
WE
CONTROLLED)
(10,11)
Notes:
10.
CE
and
WE
must be LOW for WRITE cycle.
11.
OE
is LOW for this WRITE cycle to show t
and t
.
12. If
CE
goes HIGH simultaneously with
WE
HIGH, the output remains
in a high impedance state
13. Write Cycle Time is measured from the last valid address to the first
transitioning address.
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| P4C1256L70PILF | LOW POWER 32K x 8 STATIC CMOS RAM |
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相關(guān)代理商/技術(shù)參數(shù) |
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| P4C1256L-70PI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LOW POWER 32K x 8 STATIC CMOS RAM |
| P4C1256L70PILF | 制造商:PYRAMID 制造商全稱:Pyramid Semiconductor Corporation 功能描述:LOW POWER 32K x 8 STATIC CMOS RAM |
| P4C1256L-70SC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LOW POWER 32K x 8 STATIC CMOS RAM |
| P4C1256L-70SI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LOW POWER 32K x 8 STATIC CMOS RAM |
| P4C1256L70SNCLF | 制造商:PYRAMID 制造商全稱:Pyramid Semiconductor Corporation 功能描述:LOW POWER 32K x 8 STATIC CMOS RAM |
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