參數(shù)資料
型號: P4C1049-15L36C
廠商: PYRAMID SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: HIGH SPEED 512K x 8 STATIC CMOS RAM
中文描述: 512K X 8 STANDARD SRAM, 15 ns, CDSO36
封裝: 0.452 X 0.920 INCH, CERAMIC, LCC-36
文件頁數(shù): 7/12頁
文件大小: 222K
代理商: P4C1049-15L36C
P4C1049
Page 7 of 12
Document #
SRAM128
REV OR
Notes:
10.
CE
and WE must be LOW for WRITE cycle.
11.
OE
is LOW for this WRITE cycle to show t
and t
.
12. If
CE
goes HIGH simultaneously with
WE
HIGH, the output remains
in a high impedance state
13. Write Cycle Time is measured from the last valid address to the first
transitioning address.
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (
CE
CONTROLLED)
(10)
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