
Chapter 18 Memory Mapping Control (S12XMMCV3)
MC9S12XDP512 Data Sheet, Rev. 2.17
662
Freescale Semiconductor
18.3.2.4
Direct Page Register (DIRECT)
Read: Anytime
Write: anytime in special modes, one time only in other modes.
Thisregisterdeterminesthepositionofthe256Bytedirectpagewithinthememorymap.Itisvalidforboth
global and local mapping scheme.
CAUTION
XGATEwriteaccesstothisregisterduringanCPUaccesswhichmakesuse
of this register could lead to unexpected results.
Figure 18-9. DIRECT Address Mapping
Bits[22:16]oftheglobaladdresswillbeformedbytheGPAGE[6:0]bitsincasetheCPUexecutesaglobal
instruction in direct addressing mode or by the appropriate local address to the global address expansion
(refer to
Section 18.4.2.1.1, “Expansion of the Local Address Map
).
Example 18-2. This example demonstrates usage of the Direct Addressing Mode
MOVB
#0x80,DIRECT
;Set DIRECT register to 0x80. Write once only.
;Global data accesses to the range 0xXX_80XX can be direct.
;Logical data accesses to the range 0x80XX are direct.
LDY
<00
;Load the Y index register from 0x8000 (direct access).
;< operator forces direct access on some assemblers but in
;many cases assemblers are “direct page aware” and can
Address: 0x0011
7
6
5
4
3
2
1
0
R
W
DP15
DP14
DP13
DP12
DP11
DP10
DP9
DP8
Reset
0
0
0
0
0
0
0
0
Figure 18-8. Direct Register (DIRECT)
Table 18-9. DIRECT Field Descriptions
Field
Description
7–0
DP[15:8]
Direct Page Index Bits 15–8
— These bits are used by the CPU when performing accesses using the direct
addressing mode. The bits from this register form bits [15:8] of the address (see
Figure 18-9
).
Bit15
Bit0
Bit7
Bit22
CPU Address [15:0]
Global Address [22:0]
Bit8
Bit16
DP [15:8]