
Chapter 17 Memory Mapping Control (S12XMMCV2)
MC9S12XDP512 Data Sheet, Rev. 2.17
622
Freescale Semiconductor
17.3.2.4
Direct Page Register (DIRECT)
Read: Anytime
Write: anytime in special modes, one time only in other modes.
This register determines the position of the direct page within the memory map.
CAUTION
XGATEwriteaccesstothisregisterduringanCPUaccesswhichmakesuse
of this register could lead to unexpected results.
Figure 17-9. DIRECT Address Mapping
Bits[22:16]oftheglobaladdresswillbeformedbytheGPAGE[6:0]bitsincasetheCPUexecutesaglobal
instruction in direct addressing mode or by the appropriate local address to the global address expansion
(refer to
Expansion of the CPU Local Address Map
).
Example 17-2. This example demonstrates usage of the Direct Addressing Mode by a global instruction
LDAADR
MOVB
MOVB
GLDAA
EQU $0000
#$80,DIRECT
#$14,GPAGE
<LDAADR
;Initialize LDADDR with the value of $0000
;Initialize DIRECT register with the value of $80
;Initialize GPAGE register with the value of $14
;Load Accu A from the global address $14_8000
Address: 0x0011
7
6
5
4
3
2
1
0
R
W
DP15
DP14
DP13
DP12
DP11
DP10
DP9
DP8
Reset
0
0
0
0
0
0
0
0
Figure 17-8. Direct Register (DIRECT)
Table 17-8. DIRECT Field Descriptions
Field
Description
7–0
DP[15:8]
Direct Page Index Bits 15–8
— These bits are used by the CPU when performing accesses using the direct
addressing mode. The bits from this register form bits [15:8] of the address (see
Figure 1-9
).
Bit15
Bit0
Bit7
Bit22
CPU Address [15:0]
Global Address [22:0]
Bit8
Bit16
DP [15:8]