- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385690 > P2V28S40ATP-8 (Vanguard International Semiconductor Corporation) 128Mb SDRAM Specification PDF資料下載
參數(shù)資料
| 型號： | P2V28S40ATP-8 |
| 廠商： | Vanguard International Semiconductor Corporation |
| 英文描述： | 128Mb SDRAM Specification |
| 中文描述： | 128Mb的SDRAM內(nèi)存規(guī)格 |
| 文件頁數(shù)： | 16/51頁 |
| 文件大?。?/td> | 652K |
| 代理商： | P2V28S40ATP-8 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁
JULY.2000
Rev.2.2
128Mb Synchronous DRAM
P2V28S20ATP-7,-75,-8 (4-BANK x 8,388,608-WORD x 4-BIT)
P2V28S30ATP-7,-75,-8 (4-BANK x 4,194,304-WORD x 8-BIT)
P2V28S40ATP-7,-75,-8 (4-BANK x 2,097,152-WORD x 16-BIT)
Page-15
MODE REGISTER
Burst Length, Burst Type and /CAS Latency can be pro-
grammed by setting the mode register (MRS). The mode
register stores these data until the next MRS command,
which may be issued when all banks are in idle state. After
tRSC from a MRS command, the SDRAM is ready for new
command.
R: Reserved for Future Use
BL
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
BURST
LENGTH
BT= 0
1
2
4
8
R
R
R
FP
BT= 1
1
2
4
8
R
R
R
R
0
1
BURST
TYPE
SEQUENTIAL
INTERLEAVED
A11 A10 A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
BA1
BA0
0
0
0
0
0
LTMODE
BT
BL
0
0
CL
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
LATENCY
MODE
/CAS LATENCY
2
3
R
R
R
R
R
R
/CS
/RAS
/CAS
/WE
BA0,1 A11-A0
CLK
V
FP: Full Page
POWER ON SEQUENCE
Before starting normal operation, the following power on
sequence is necessary to prevent a SDRAM from damaged
or malfunctioning.
1. Apply power and start clock. Attempt to maintain CKE
high, DQM high and NOP condition at the inputs.
2. Maintain stable power, stable clock, and NOP input con-
ditions for a minimum of 200μs.
3. Issue precharge commands for all banks. (PRE or PREA)
4. After all banks become idle state (after tRP), issue 8 or
more auto-refresh commands.
5. Issue a mode register set command to initialize the mode
register.
After these sequence, the SDRAM is idle state and ready
for normal operation.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| P2V28S20ATP-75 | 128Mb SDRAM Specification |
| P2V28S20ATP-8 | 128Mb SDRAM Specification |
| P2V28S20DTP-7 | 128Mb SDRAM Specification |
| P2V28S30ATP-7 | 128Mb SDRAM Specification |
| P2V28S30ATP-75 | 128Mb SDRAM Specification |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P2V2FB1 | 制造商:SEMTECH_ELEC 制造商全稱:SEMTECH ELECTRONICS LTD. 功能描述:ZENER DIODES |
| P2V2FB2 | 制造商:SEMTECH_ELEC 制造商全稱:SEMTECH ELECTRONICS LTD. 功能描述:ZENER DIODES |
| P2V4FB1 | 制造商:SEMTECH_ELEC 制造商全稱:SEMTECH ELECTRONICS LTD. 功能描述:ZENER DIODES |
| P2V4FB2 | 制造商:SEMTECH_ELEC 制造商全稱:SEMTECH ELECTRONICS LTD. 功能描述:ZENER DIODES |
| P2V7B | 制造商:SEMTECH 制造商全稱:Semtech Corporation 功能描述:Silicon Planar Power Zener Diodes |
發(fā)布緊急采購，3分鐘左右您將得到回復。