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參數(shù)資料
| 型號(hào)： | P2005SG-08ST |
| 元件分類： | XO, clock |
| 英文描述： | 32 MHz, VIDEO CLOCK GENERATOR, PDSO8 |
| 封裝： | 0.150 INCH, GREEN, SOIC-8 |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大?。?/td> | 341K |
| 代理商： | P2005SG-08ST |
November 2006
P2005A/S
rev 1.3
Low Frequency EMI Reduction IC
3 of 8
Notice: The information in this document is subject to change without notice.
Spread Spectrum
The Output Frequency Selection Table and the Frequency Deviations Selections Table illustrate the two possible spread
spectrum options. The optimal setting should minimize system EMI to the fullest without affecting system performance. The
spreading is described as a percentage deviation of the center frequency (Note: The center frequency is the frequency of the
external reference input on CLKIN, Pin1).
Example:
The P2005A/S is designed for communications, digital video and imaging applications. It is not only optimized for operation
in the 8MHz – 32MHz range, but its output frequency can be extended down to one half of the input clock frequency using
the divide-by-two feature. This feature extends low frequency as low as to 4MHz. Setting Pin 3 low (DIV2 = 0; Divide-by-two
mode) sets the output frequency (ModOUT) to half the frequency of the input clock (CLKIN). This is a simple way to generate
a spread spectrum modulated low frequency clock when only a higher frequency signal is available. If you want the output
frequency to be the same as the input, you can either set DIV2=1 or leave it unconnected.
Selecting the P2005A/S’s spread options is a matter of either setting SR0=1 or SR0=0. Setting SR0=0 set as a lower
modulation spread, while setting it to 1 introduces a wider spectral spread in the output clock. Refer Modulation output and
Spreading Selections Tables. The example given in the figure below shows the device set to the divide-by-two mode
(DIV2=0) with a lower spectrum range (SR0=0). The versatility provided by allowing both clock division and spread spectrum
on one chip is already proving to be a popular solution among leading system manufacturers.
P2005A/S Application Schematic
1
2
3
4
CLKIN
XOUT
DIV2
VSS
MODOUT
5
6
7
8
SR0
SSON#
VDD
8.832MHz Crystal
Modulated 4.416MHz is
connected to CLK input
pin of the system
+3.3V
0.1F
P2005A/S
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| P2010A-08TR | OTHER CLOCK GENERATOR, PDSO8 |
| P2010A-08TT | OTHER CLOCK GENERATOR, PDSO8 |
| P2010A-08TR | OTHER CLOCK GENERATOR, PDSO8 |
| P2010A-08ST | OTHER CLOCK GENERATOR, PDSO8 |
| P201D-5R | SPECIALTY OPTOELECTRONIC DEVICE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P2005SG-08TR | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:Low Frequency EMI Reduction IC |
| P2005SG-08TT | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:Low Frequency EMI Reduction IC |
| P2005T | 功能描述:固定電感器 172.5nH 20% 15A RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
| P2005X-08SR | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Frequency EMI Reduction IC |
| P2005X-08ST | 制造商:ALSC 制造商全稱:Alliance Semiconductor Corporation 功能描述:Low Frequency EMI Reduction IC |
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