參數(shù)資料
型號(hào): P1819GF-08SR
廠商: ON Semiconductor
文件頁(yè)數(shù): 2/6頁(yè)
文件大?。?/td> 0K
描述: IC CLK EMI REDUCTION FREQ 8SOIC
標(biāo)準(zhǔn)包裝: 2,500
類型: 扇出配送,頻率調(diào)制器,擴(kuò)展頻譜時(shí)鐘發(fā)生器
PLL:
輸入: 時(shí)鐘,晶體
輸出: CMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無(wú)/無(wú)
頻率 - 最大: 40MHz
除法器/乘法器: 是/無(wú)
電源電壓: 3 V ~ 3.6 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOICN
包裝: 帶卷 (TR)
P1819
Rev.3 | Page 2 of 6 | www.onsemi.com
Pin Configuration
Pin Description
Pin#
Pin Name
Type
Description
P1819B
P1819G
1
XIN / CLKIN
I
Crystal Connection or external frequency input. This pin
has dual functions. It can be connected to either an
external crystal or an external reference clock.
2
VSS
P
Ground Connection. Connect to system ground.
3
SRS
I
Spread range select. Digital logic input used to select
frequency deviation (Refer to Spread Deviation Selection
Table). This pin has an internal pull-up resistor.
3
D_C / NC
I
Digital logic input used to select Down (LOW) or Center
(HIGH) spread options (Refer to Spread Deviation
Selection
Table). This pin has an internal pull-up
resistor.
4
ModOUT
O
Spread spectrum clock output. (Refer to Input Frequency
and Modulation Rate
Table and Spread Deviation
Selection
Table).
5
REF
O
Non-modulated Reference clock output of the input
frequency.
6
PD#
I
Power down control pin. Pull XIN/CLKIN and PD# LOW
to enable Power-Down mode. This pin has an internal
pull-up resistor.
7
VDD
P
Power Supply for the entire chip.
8
XOUT
O
Crystal Connection. Input connection for an external
crystal. If using an external reference, this pin must be
left unconnected.
Note: Pin 3 is NC in P1819Q.
Input Frequency and Modulation Rate
Part Number
Input Frequency Range
Output Frequency range
Modulation rate
P1819
20MHz to 40MHz
Input Frequency / 896
VDD
PD#
XOUT
REF
1
2
3
4
5
6
7
8
P1819 B
XIN / CLKIN
VSS
SRS
ModOUT
VDD
REF
1
2
3
4
5
6
7
8
P1819 G
XIN / CLKIN
VSS
D_C / NC
ModOUT
PD#
XOUT
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