參數(shù)資料
型號: P13914EJ1V0AN00
英文描述: uPC8128TB. uPC8151TB. and uPC8152TB Low-Current Silicon MMIC Amplifiers for Cellular/Cordless Telephones
中文描述: uPC8128TB。 uPC8151TB。和uPC8152TB低電流硅單片放大器的蜂窩/無繩電話
文件頁數(shù): 9/35頁
文件大?。?/td> 233K
代理商: P13914EJ1V0AN00
9
Application Note P13914EJ1V0AN00
3.
THEORETICAL DESCRIPTION
3.1 Description of Internal Circuits
The
μ
PC8128TB and
μ
PC8151TB have simple two-stage configurations without negative feedback. The
μ
PC8152TB incorporates 50-
matching circuit formed by resistors on the input side. A multiple negative feedback
circuit is provided to offset the variations between HFE and resistance. To obtain desired RF characteristics, a two-
stage configuration is employed. Figure 3-1 shows an internal equivalent circuit.
The output pins of the ICs in this product line-up are used to constitute matching circuits externally, and low
current consumption is achieved due to open collector output of the output-stage transistor and by high impedance
output. For the bias to the output pins, the same voltage as the V
CC
is applied via the inductor of the matching circuit.
Figure 3-1. Internal Equivalent Circuits of Low-Current Silicon MMIC Amplifiers
μ
PC8128TB/8151TB
μ
PC8152TB
2
5
3
6
4
OUT
GND1
GND2
V
CC
1
IN
2
3
GND1
GND2
5
6
4
V
CC
OUT
1
IN
3.2 Description of External Circuits
External Circuit Configuration
By attaching an external inductor to the output pin, the ICs in this product line-up can achieve low-current
consumption that could not be obtained by conventional internal 50-
wideband matching ICs. Therefore, a
narrowband matching circuit should be configured by using an LC externally attached to the output pin to suit the
usage frequency. Also, since the
μ
PC8128TB or
μ
PC8151TB does not have an on-chip 50-
matching circuit
based on the resistance of the IC's input stage, the input stage return loss increases. To improve the input stage
return loss of the
μ
PC8128TB or
μ
PC8151TB, a narrowband matching circuit that suits the usage frequency is
also required at the input stage.
The following three external circuit configurations can be considered according to the differences of the matching
circuits.
<1> Output isolation matching (no matching for the input stage, and an output stage return loss optimized to
approximately 10 to 20 dB)
<2> Output 50-
matching (no matching for the input stage, and matching of the output stage to 50
)
<3> Input/output 50-
matching (matching both of the input and output stages to 50
)
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