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參數(shù)資料
| 型號： | OZ6833B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | ACPI CardBus Controller |
| 中文描述： | ACPI的CardBus控制器 |
| 文件頁數(shù)： | 6/15頁 |
| 文件大?。?/td> | 118K |
| 代理商： | OZ6833B |
OZ6833
OZ6833-DS-1.55
Page 6
Pin Number
TQFP
34
Pin Name
Description
BGA
L2
Input
Type
Power
Rail
4
Drive
SERR#
System Error:
This output is driven
active LOW to indicate an address parity
error.
Parity:
This pin generates PCI parity and
ensures even parity across AD[31:0] and
C/BE[3:0]#. During the address phase,
PAR is valid after one clock. With data
phases, PAR is stable one clock after a
write or read transaction.
PCI Clock:
This input provides timing for
all transactions on the PCI bus to and from
the OZ6833. All PCI bus signals, except
RST#, are sampled and driven on the
rising edge of PCI_CLK. This input can be
operated at frequencies from 0 to 33MHz.
Device Reset
: This input is used to
initialize all registers and internal logic to
their reset states and place most OZ6833
pins in a HIGH-impedance state.
Ring Indicate Out
: This pin is Ring
Indicate when the following occurs while
O
Mode Control B Register (index 2Eh)
bit 7 is set to 1:
1)
Power Control (Index+02h) bit 7 set
to 1
2)
Interrupt
and
(Index+03h) bit 7 set to 1
3)
PCI O
Micro Control 2 (Offset: D4h)
bit X = 0
PCI Clock Run Request:
This signal is
used by the central resource to request
permission to stop the PCI clock or to slow
it down, and the OZ6833 responds
accordingly. To enable the CLKRUN#
signal, you need to enable ExCA register
3B bit[3:2].
Power Management Event:
A power
management event is the process by
which the OZ6833 can request a change
of its power consumption state. Usually, a
PME occurs during a request to change
from a power saving state to the fully
operational state.
Socket B Activity:
This signal indicates
that there is any activity on the socket B
read/write
access.
Configuration Register 90h.
PCI Bus Interrupt A:
This output
indicates
a
programmable
request generated from any of a number
of card actions. Although there is no
specific
mapping
connecting
interrupt
OZ6833 to the system, a common use is
to connect this pin to the system PCI bus
INTA# signal.
-
TO
PCI Spec
PAR
35
L3
TTL
I/O
4
PCI Spec
PCI_CLK
1
A1
TTL
I
4
-
RST#
207
C3
TTL
I
1
-
RI_OUT
General
Control
72
P8
-
TO
1
4mA
CLKRUN#
208
B2
TTL
I/O
4
PCI Spec
PME#
163
D13
-
TO
5
4mA
SKTB_ACTV
Refer
to
PCI
193
A7
-
TO
1
4mA
INTA#
interrupt
requirement
lines
for
the
from
203
A3
-
TO
4
PCI Spec
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| OZ6833T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ACPI CardBus Controller |
| OZ6912 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Slot ACPI CardBus Controller |
| OZ6912B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Slot ACPI CardBus Controller |
| OZ6912T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Slot ACPI CardBus Controller |
| OZ6933 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ACPI CardBus Controller |
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