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參數(shù)資料
| 型號(hào)： | OR73 |
| 廠商： | AUSTRIAMICROSYSTEMS AG |
| 英文描述： | 7-input OR gate with 3x drive strength. |
| 中文描述： | 7，輸入或3倍驅(qū)動(dòng)強(qiáng)度門。 |
| 文件頁(yè)數(shù)： | 1/2頁(yè) |
| 文件大?。?/td> | 13K |
| 代理商： | OR73 |
OR73 is a 7-input OR gate with 3x drive strength.
Truth Table
D
E
F
G
B
C
A
Q
Capacitance
A
B
C
D
E
F
G
Q
Ci (pF)
L
H
X
X
X
X
X
X
L
X
H
X
X
X
X
X
L
X
X
H
X
X
X
X
L
X
X
X
H
X
X
X
L
X
X
X
X
H
X
X
L
X
X
X
X
X
H
X
L
X
X
X
X
X
X
H
L
H
H
H
H
H
H
H
A
B
C
D
E
F
G
0.046
0.043
0.048
0.044
0.041
0.043
0.048
Area
Power
1.35 mils
2
6.28
μW
/
MHz
Delay [ns] = tpd.. = f(SL, L)
Output Slope [ns] = op_sl.. = f(L)
with SL = Input Slope [ns] ; L = Output Load [pF]
AC Characteristics : Tj = 25°C VDD = 3.3V Typical Process
AC Characteristics
Characteristics
Symbol
SL = 0.1
SL = 2.0
L = 0.3
L = 2.1
L = 3.0
L = 0.3
L = 2.1
L = 3.0
Delay A to Q
tpdar
tpdaf
tpdbr
tpdbf
tpdcr
tpdcf
tpddr
tpddf
tpder
tpdef
tpdfr
tpdff
tpdgr
tpdgf
0.69
0.58
0.76
0.66
0.87
0.67
0.66
0.70
0.74
0.82
0.80
0.88
0.86
0.89
2.12
1.56
2.21
1.63
2.30
1.65
2.13
1.75
2.21
1.87
2.32
1.91
2.35
1.92
2.86
2.01
2.87
2.08
2.99
2.12
2.84
2.20
2.89
2.32
2.97
2.38
3.04
2.38
0.94
0.82
1.05
0.79
1.10
0.77
0.92
0.94
1.00
0.97
1.07
0.98
1.13
0.96
2.38
1.77
2.50
1.75
2.52
1.73
2.38
1.98
2.43
2.01
2.57
2.03
2.60
2.00
3.04
2.26
3.23
2.25
3.20
2.23
3.02
2.44
3.23
2.47
3.27
2.48
3.36
2.47
Delay B to Q
Delay C to Q
Delay D to Q
Delay E to Q
Delay F to Q
Delay G to Q
Output Slope A to Q
op_slar
op_slaf
1.02
0.68
5.30
3.51
7.28
4.76
1.03
0.67
5.23
3.53
7.32
4.85
Rev. N/C
Sept. 1996
- 355 -
Austria Mikro Systeme International
R
0.6 μm CMOS
CUB
OR73
OR73
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