
Data Sheet
June 1999
ORCA Series 2 FPGAs
Lucent Technologies Inc.
167
Timing Characteristics
(continued)
Figure 72. Readback Timing Diagram
Table 54. Series 2 Readback Timing Characteristics
OR2CxxA Commercial: V
DD
= 5.0 V ± 5%, 0 °C
≤
T
A
≤
70 °C; OR2CxxA Industrial: V
DD
= 5.0 V ± 10%, –40 °C
≤
T
A
≤
+85 °C.
OR2TxxA/B Commercial: V
DD
= 3.0 V to 3.6 V, 0 °C
≤
T
A
≤
70 °C; OR2TxxA/B Industrial: V
DD
= 3.0 V to 3.6 V,
–40 °C
≤
T
A
≤
+85
°C.
Parameter
Symbol
T
S
T
RBA
T
CL
T
CH
F
C
T
D
Min
50
2
50
50
—
—
Max
—
—
—
—
10
50
Unit
ns
CCLK
ns
ns
MHz
ns
RD_CFGN
to CCLK Setup Time
RD_CFGN
High Width to Abort Readback
CCLK Low Time
CCLK High Time
CCLK Frequency
CCLK to RD_DATA Delay
5-4536(F)
T
D
T
CH
CCLK
RD_DATA
T
S
T
CL
RD_CFGN
BIT 0
BIT 1
BIT 0
T
RBA