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Data Sheet
ORCA Series 2 FPGAs
June 1999
114
Lucent Technologies Inc.
AC4
VSS
AC8
VSS
AD24
VSS
AD3
VSS
AE1
VSS
AE2
VSS
AE25
VSS
AF1
VSS
AF25
VSS
AF26
VSS
B2
VSS
B25
VSS
B26
VSS
C24
VSS
C3
VSS
D14
VSS
D19
VSS
D23
VSS
D4
VSS
D9
VSS
H4
VSS
J23
VSS
N4
VSS
P23
VSS
V4
VSS
W23
VSS
AA23
VDD
AA4
VDD
AC11
VDD
AC16
VDD
AC21
VDD
AC6
VDD
D11
VDD
D16
VDD
D21
VDD
D6
VDD
F23
VDD
F4
VDD
L23
VDD
Pin Information (continued)
Table 27. OR2C/2T10A, OR2C/2T12A, OR2C/2T15A/B, OR2C/2T26A, and OR2T40A/B 352-Pin PBGA
Pinout (continued)
Pin
2C/2T10A Pad
2C/2T12A Pad
2C/2T15A/B Pad
2C/2T26A Pad OR2T40A/B Pad
Function
Notes:
The pins labeled I/O-VDD5 are user I/Os for the OR2CxxA and OR2TxxB series, but they are connected to VDD5 for the OR2TxxA series.
The pins labeled VSS-ETC are the 6 x 6 array of thermal balls located at the center of the package. The balls can be attached to the ground plane
of the board for enhanced thermal capability (see Table 29), or they can be left unconnected.