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參數(shù)資料
| 型號(hào)： | OR2C06A-4PS240I |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Ceramic Chip Capacitors / MIL-PRF-55681; Capacitance [nom]: 330pF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-5%; Dielectric: Multilayer Ceramic; Temperature Coefficient: C0G (NP0); Lead Style: Surface Mount Chip; Lead Dimensions: 1808; Termination: Solder Coated SnPb; Body Dimensions: 0.180" x 0.080" x 0.080"; Container: Bag; Features: MIL-PRF-55681: P Failure Rate |
| 中文描述： | 現(xiàn)場(chǎng)可編程門陣列 |
| 文件頁(yè)數(shù)： | 154/192頁(yè) |
| 文件大?。?/td> | 3148K |
| 代理商： | OR2C06A-4PS240I |
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64
Lucent Technologies Inc.
Data Sheet
ORCA Series 2 FPGAs
June 1999
Estimating Power Dissipation (continued)
OR2T15A Clock Power
P
= [0.34 mW/MHz
+ (0.17 mW/MHz – Branch) (# Branches)
+ (0.01 mW/MHz – PFU) (# PFUs)
+ (0.003 mW/MHz – SMEM_PFU)
(# SMEM_PFUs)] fCLK
For a quick estimate, the worst-case (typical circuit)
OR2T15A clock power
≈ 5.9 mW/MHz.
OR2T26A Clock Power
P
= [0.35 mW/MHz
+ (0.19 mW/MHz – Branch) (# Branches)
+ (0.01 mW/MHz – PFU) (# PFUs)
+ (0.003 mW/MHz – SMEM_PFU)
(# SMEM_PFUs)] fCLK
For a quick estimate, the worst-case (typical circuit)
OR2T26A clock power
≈ 8.3 mW/MHz.
OR2T40A Clock Power
P
= [0.37 mW/MHz
+ (0.23 mW/MHz – Branch) (# Branches)
+ (0.01 mW/MHz – PFU) (# PFUs)
+ (0.003 mW/MHz – SMEM_PFU)
(# SMEM_PFUs)] fCLK
For a quick estimate, the worst-case (typical circuit)
OR2T40A clock power
≈ 12.4 mW/MHz.
The power dissipated in a PIC is the sum of the power
dissipated in the four I/Os in the PIC. This consists of
power dissipated by inputs and ac power dissipated by
outputs. The power dissipated in each I/O depends on
whether it is configured as an input, output, or input/
output. If an I/O is operating as an output, then there is
a power dissipation component for PIN, as well as
POUT. This is because the output feeds back to the
input.
The power dissipated by an input buffer (VIH = VDD –
0.3 V or higher) is estimated as:
PIN = 0.09 mW/MHz
The 5 V tolerant input buffer feature dissipates addi-
tional dc power. The dc power, PTOL, is always dissi-
pated for the OR2TxxA, regardless of the number of
5 V tolerant input buffers used when the VDD5 pins are
connected to a 5 V supply as shown in Table 16. This
power is not dissipated when the VDD5 pins are con-
nected to the 3.3 V supply.
Table 16. dc Power for 5 V Tolerant I/Os for
OR2TxxA deviced
The ac power dissipation from an output or bidirec-
tional is estimated by the following:
POUT = (CL + 8.8 pF) x VDD2 x F Watts
where the unit for CL is farads, and the unit for F is Hz.
As an example of estimating power dissipation,
suppose that a fully utilized OR2T15A has an average
of three outputs for each of the 400 PFUs, that all
20 clock branches are used, that 150 of the 400 PFUs
in a synchronous memory mode), and that the PFU
outputs have an average activity factor of 20%.
Twenty inputs, 32 outputs driving 30 pF loads, and
16 bidirectional I/Os driving 50 pF loads are also gen-
erated from the 40 MHz clock with an average activity
factor of 20%. The worst-case (VDD = 3.6 V) power dis-
sipation is estimated as follows:
PPFU = 400 x 3 (0.08 mW/MHz x 20 MHz x 20%)
= 384 mW
PCLK = [0.34 mW/MHz + (0.17 mW/MHz – Branch)
(20 Branches)
+ (0.01 mW/MHz – PFU) (150 PFUs)
+ (0.003 mW/MHz – SMEM_PFU)
(16 SMEM_PFUs)] [40 MHz]
= 212 mW
PIN
= 20 x [0.09 mW/MHz x 20 MHz x 20%]
= 7 mW
PTOL
= 3.4 mW
POUT = 30 x [(30 pF + 8.8 pF) x (3.6)2 x 20 MHz
x 20%]
= 60 mW
PBID
= 16 x [(50 pF + 8.8 pF) x (3.6)2 x 20 MHz
x 20%]
= 49 mW
TOTAL
= 0.72 W
Device
PTOL (VDD5 = 5.25 V)
2T04A
1.7 mW
2T06A
2.0 mW
2T08A
2.4 mW
2T10A
2.7 mW
2T12A
3.0 mW
2T15A
3.4 mW
2T26A
4.0 mW
2T40A
5.0 mW
相關(guān)PDF資料 |
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| OR2C06A-4PS256 | Field-Programmable Gate Arrays |
| OR2C06A-4PS256I | Field-Programmable Gate Arrays |
| OR2C06A-4PS84 | Field-Programmable Gate Arrays |
| OR2C06A-4PS84I | Field-Programmable Gate Arrays |
| OR2C06A-4S144 | Field-Programmable Gate Arrays |
相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| OR2C06A-4PS256 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays |
| OR2C06A-4PS256I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays |
| OR2C06A-4PS84 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays |
| OR2C06A-4PS84I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays |
| OR2C06A-4S100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays |
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