
OPA622
4
PAD
FUNCTION
1
2
3
4
5
6
7
8
9
10
11
12
13
Quiescent Current Adjustment
Inverting Analog Input
Non-Inverting Analog Input
NC
NC
–5V Supply
–5V Supply, Output
Inverting Buffer Output
Analog Output
Analog OTA Output
+5V Supply, Output
+5V Supply
Non-Inverting Buffer Output
Substrate Bias:
Negative Supply
NC:
No Connection
Wire Bonding: Gold wire bonding is recommended.
DICE INFORMATION
MECHANICAL INFORMATION
MILS (0.001")
MILLIMETERS
Die Size
Die Thickness
Min. Pad Size
Backing: Titanium
Gold
57 x 69
±
5
14
±
1
4 x 4
0.02+0.05,–0.0
0.30
±
0.05
1.44 x 1.76
±
0.13
0.55
±
0.025
0.10 x 0.10
0.0005+0.0013, –0.0
0.0076
±
0.0013
OPA622AD DIE TOPOGRAPHY
PIN NO.
DESCRIPTION
FUNCTION
1
2
3
4
5
6
NC
No Connection
Quiescent Current Adjustment; typical 3-8mA
Inverting Analog Input
Noninverting Analog Input
Negative Supply Voltage; typical –5VDC
Negative Supply Voltage Output Buffer;
typical –5VDC
Analog Output Feedback Buffer
Analog Output
Analog Output OTA
Positive Supply Voltage Output Buffer; typical
+5VDC
Positive Supply Voltage; typical +5VDC
Analog Output/Input
No Connection
I
Q
Adjust
–In
+In
–V
CC
–V
CC OUT
8
9
BUF–
V
OTA
+V
CC OUT
10
11
12
13
14
+V
BUF+
NC
PIN CONFIGURATION
FUNCTIONAL DESCRIPTION
NC
I
Q
Adjust
–In
+In
–V
CC
–V
CC OUT
NC
NC
BUF+
+V
CC
+V
CC OUT
OTA
V
OUT
BUF–
1
2
3
4
5
6
7
OPA622
14
13
12
11
10
9
8
FB
OTA
OB
13
4
10
3
5
12
2
Biasing
11
6
8
SO/DIP
9
Top View
ELECTROSTATIC
DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from per-
formance degradation to complete device failure. Burr-
Brown Corporation recommends that all integrated circuits
be handled and stored using appropriate ESD protection
methods.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet
published specifications.