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參數資料
| 型號： | OPA2107AUE4 |
| 英文描述： | Precision Dual Difet Operational Amplifier |
| 中文描述： | 精密雙運算放大器Difet |
| 文件頁數： | 7/11頁 |
| 文件大?。?/td> | 688K |
| 代理商： | OPA2107AUE4 |
OPA2107
SBOS161A
7
www.ti.com
FIGURE 2. FET Input Instrumentation Amplifier.
I
= 5pA Max
Gain = 100
CMRR ~ 95dB
R
IN
= 10
13
~
Differential Voltage Gain = 1 + 2R
F
/R
G
= 100
A
1
Output
3
2
B
7
6
5
1
–
In
+In
R
F
5k
R
F
5k
R
G
101
25k
25k
1/2
OPA2107
1/2
OPA2107
25k
25k
6
5
3
2
INA105
FIGURE 3. Precision Instrumentation Amplifier.
Using the INA106 for an output difference amplifier extends the input
common-mode range of an instrumentation amplifier (IA) to
±
10V.
A conventional IA with a unity-gain difference amplifier has an input
common-mode range limited to
±
5V for an output swing of
±
10V. This is
because a unity-gain difference amplifier needs
±
5V at the input for 10V
at the output, allowing only 5V additional for common-mode range.
E
O
= [10 (1 + 2R
F
/R
G
) (E
2
–
E
1
)] = 1000 (E
2
–
E
1
)
A
1
E
Output
3
2
B
7
6
5
1
E
–
In
R
F
10k
R
F
10k
R
G
202
10k
10k
1/2
OPA2107
1/2
OPA2107
100k
100k
6
5
3
2
INA106
1
E
+In
2
APPLICATIONS INFORMATION
AND CIRCUITS
The OPA2107 is unity-gain stable and has an excellent
phase margin. This makes it easy to use in a wide variety of
applications.
Power-supply connections should be bypassed with capaci-
tors positioned close to the amplifier pins. In most cases,
0.1
μ
F ceramic capacitors are adequate. Applications with
larger load currents and fast transient signals may need up
to 1
μ
F tantalum bypass capacitors.
INPUT BIAS CURRENT
The OPA2107
Difet
input stages have very low input bias
current
—
an order of magnitude lower than BIFET op amps.
Circuit-board leakage paths can significantly degrade per-
formance. This is especially evident with the SO-8 surface-
mount package where pin-to-pin dimensions are particularly
small. Residual soldering flux, dirt, and oils, which conduct
leakage current, can be removed by proper cleaning. In most
instances, a two-step cleaning process is adequate using a
clean organic solvent rinse followed by deionized water.
Each rinse should be followed by a 30-minute bake at 85
°
C.
A circuit-board guard pattern effectively reduces errors due
to circuit-board leakage (Figure 1). By encircling critical high-
impedance nodes with a low-impedance connection at the
same circuit potential, any leakage currents will flow harm-
lessly to the low-impedance node. Guard traces should be
placed on all levels of a multiple-layer circuit board.
A
In
Non-Inverting
1
A
In
Buffer
1
Out
2
3
A
In
Inverting
1
Out
2
3
Out
2
3
FIGURE 1. Connection of Input Guard.
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|---|---|
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| OPA2111AM | 功能描述:運算放大器 - 運放 Dual Lo-Noise Difet Op Amp RoHS:否 制造商:STMicroelectronics 通道數量:4 共模抑制比（最小值）:63 dB 輸入補償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風格:SMD/SMT 封裝 / 箱體:QFN-16 轉換速度:0.89 V/us 關閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
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