VDD VREF
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� OP467GP
寤犲晢锛� Analog Devices Inc
鏂囦欢闋佹暩(sh霉)锛� 8/20闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC OPAMP GP 28MHZ QUAD 14DIP
妯欐簴鍖呰锛� 25
鏀惧ぇ鍣ㄩ鍨嬶細 閫氱敤
闆昏矾鏁�(sh霉)锛� 4
杞夋彌閫熺巼锛� 350 V/µs
澧炵泭甯跺绌嶏細 28MHz
闆绘祦 - 杓稿叆鍋忓锛� 150nA
闆诲 - 杓稿叆鍋忕Щ锛� 200µV
闆绘祦 - 闆绘簮锛� 8mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� ±4.5 V ~ 18 V
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 閫氬瓟
灏佽/澶栨锛� 14-DIP锛�0.300"锛�7.62mm锛�
渚涙噳鍟嗚ō鍌欏皝瑁濓細 14-PDIP
鍖呰锛� 绠′欢
OP467
Rev. | Page 16 of 20
00
30
2-
0
50
15
VDD
VREFAVREFC
RFBARFBC
RFBBRFBD
VREFBVREFD
DB0 (LSB)
DS2
IOUT 1A
IOUT 1C
IOUT 2A/
IOUT 2C/
IOUT 2B
IOUT 2D
IOUT 1B
IOUT 1D
DGND
DAC8408
OUT A
OUT B
OUT D
OUT C
C1
10pF
C3
10pF
C4
10pF
C2
10pF
7
5
4
11
6
OP467
1
2
3
7
8
9
10
11
12
4
5
6
13
14
DIGITAL
CONTROL
SIGNALS
DB1
DB2
DB3
DB4
DB5
(MSB) DB7
DB6
28
27
26
22
21
20
19
18
17
25
24
23
16
R/W
A/B
DS1
0.1F
+15V
+10V
+5V
+10V
鈥�15V
2
3
OP467 14
12
13
OP467
8
10
9
Figure 50. Quad DAC Unipolar Operation
FAST I-TO-V CONVERTER
The fast slew rate and fast settling time of the OP467 are well
suited to the fast buffers and I-to-V converters used in a variety
of applications. The circuit in Figure 50 is a unipolar quad DAC
consisting of only two ICs. The current output of the DAC8408
is converted to a voltage by the OP467 configured as an I-to-V
converter. This circuit is capable of settling to 0.1% within 200 ns.
Figure 51 and Figure 52 show the full-scale settling time of the
outputs. To obtain reliable circuit performance, keep the traces
from the IOUT of the DAC to the inverting inputs of the OP467
short to minimize parasitic capacitance.
00
30
2-
05
1
260.0ns
100ns
50mV
2V
100
90
10
0%
Figure 51. Falling Edge Output Settling Time
00
30
2-
05
2
251.0ns
100ns
50mV
2V
100
90
10
0%
Figure 52. Rising Edge Output Settling Time
00
30
2-
05
3
2k
1k
60.4k
604
50k
3pF
DAC8408
DC OFFSET
RFB
IOUT
I-V
OP467
AD847
Figure 53. DAC VOUT Settling Time Circuit
鐩搁棞PDF璩囨枡
PDF鎻忚堪
961246-6804-AR CONN HEADER VERT DUAL 46POS GOLD
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鐩搁棞浠g悊鍟�/鎶€琛撳弮鏁�(sh霉)
鍙冩暩(sh霉)鎻忚堪
OP467GP 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:SEMICONDUCTORSLINEAR
OP467GPZ 鍔熻兘鎻忚堪:IC OPAMP GP 28MHZ QUAD 14DIP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯欐簴鍖呰:2,500 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:閫氱敤 闆昏矾鏁�(sh霉):4 杓稿嚭椤炲瀷:- 杞夋彌閫熺巼:0.6 V/µs 澧炵泭甯跺绌�:1MHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:45nA 闆诲 - 杓稿叆鍋忕Щ:2000µV 闆绘祦 - 闆绘簮:1.4mA 闆绘祦 - 杓稿嚭 / 閫氶亾:40mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):3 V ~ 32 V锛�±1.5 V ~ 16 V 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:14-TSSOP锛�0.173"锛�4.40mm 瀵級 渚涙噳鍟嗚ō鍌欏皝瑁�:14-TSSOP 鍖呰:甯跺嵎 (TR) 鍏跺畠鍚嶇ū:LM324ADTBR2G-NDLM324ADTBR2GOSTR
OP467GS 鍔熻兘鎻忚堪:IC OPAMP GP 28MHZ QUAD 16SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯欐簴鍖呰:50 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:J-FET 闆昏矾鏁�(sh霉):2 杓稿嚭椤炲瀷:- 杞夋彌閫熺巼:3.5 V/µs 澧炵泭甯跺绌�:1MHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:30pA 闆诲 - 杓稿叆鍋忕Щ:2000µV 闆绘祦 - 闆绘簮:200µA 闆绘祦 - 杓稿嚭 / 閫氶亾:- 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):7 V ~ 36 V锛�±3.5 V ~ 18 V 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:閫氬瓟 灏佽/澶栨:8-DIP锛�0.300"锛�7.62mm锛� 渚涙噳鍟嗚ō鍌欏皝瑁�:8-PDIP 鍖呰:绠′欢
OP467GS-REEL 鍔熻兘鎻忚堪:IC OPAMP GP 28MHZ QUAD 16SOIC RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯欐簴鍖呰:2,500 绯诲垪:Excalibur™ 鏀惧ぇ鍣ㄩ鍨�:J-FET 闆昏矾鏁�(sh霉):1 杓稿嚭椤炲瀷:- 杞夋彌閫熺巼:45 V/µs 澧炵泭甯跺绌�:10MHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:20pA 闆诲 - 杓稿叆鍋忕Щ:490µV 闆绘祦 - 闆绘簮:1.7mA 闆绘祦 - 杓稿嚭 / 閫氶亾:48mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):4.5 V ~ 38 V锛�±2.25 V ~ 19 V 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:8-SOIC锛�0.154"锛�3.90mm 瀵級 渚涙噳鍟嗚ō鍌欏皝瑁�:8-SOIC 鍖呰:甯跺嵎 (TR)
OP467GSZ 鍔熻兘鎻忚堪:IC OPAMP GP 28MHZ QUAD 16SOIC RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> Linear - Amplifiers - Instrumentation 绯诲垪:- 妯欐簴鍖呰:2,500 绯诲垪:- 鏀惧ぇ鍣ㄩ鍨�:閫氱敤 闆昏矾鏁�(sh霉):4 杓稿嚭椤炲瀷:- 杞夋彌閫熺巼:0.6 V/µs 澧炵泭甯跺绌�:1MHz -3db甯跺:- 闆绘祦 - 杓稿叆鍋忓:45nA 闆诲 - 杓稿叆鍋忕Щ:2000µV 闆绘祦 - 闆绘簮:1.4mA 闆绘祦 - 杓稿嚭 / 閫氶亾:40mA 闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±):3 V ~ 32 V锛�±1.5 V ~ 16 V 宸ヤ綔婧害:0°C ~ 70°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:14-TSSOP锛�0.173"锛�4.40mm 瀵級 渚涙噳鍟嗚ō鍌欏皝瑁�:14-TSSOP 鍖呰:甯跺嵎 (TR) 鍏跺畠鍚嶇ū:LM324ADTBR2G-NDLM324ADTBR2GOSTR