參數(shù)資料
型號(hào): OP413
廠商: Analog Devices, Inc.
英文描述: Low Noise, Low Drift Single-Supply Operational Amplifiers(低噪聲,低漂移,單電源運(yùn)算放大器)
中文描述: 低噪聲,低漂移單電源運(yùn)算放大器(低噪聲,低漂移,單電源運(yùn)算放大器)
文件頁(yè)數(shù): 15/16頁(yè)
文件大?。?/td> 438K
代理商: OP413
OP113/OP213/OP413
REV. B
–15–
* SECOND CURRENT NOISE SOURCE
DN5
27
28
DIN
DN6
28
29
DIN
VN5
27
0
DC 2
VN6
0
29
DC 2
*
* GAIN ST AGE & DOMINANT POLE AT .2000E+01 HZ
G2
34
36
19
20
2.65E–04
R7
34
36
39E+06
V3
35
4
DC
6
D4
36
35
DX
VB2
34
4
1.6
*
* SUPPLY/2 GENERAT OR
ISY
7
4
0.2E–3
R10
7
60
40E+3
R11
60
4
40E+3
C3
60
0
1E–9
*
* CMRR ST AGE & POLE AT 6 kHZ
ECM
50
4
POLY(2) 3
CCM 50
51
26.5E–12
RCM1 50
51
1E6
RCM2 51
4
1
*
*
OUT PUT ST AGE
R12
37
36
1E3
R13
38
36
500
C4
37
6
20E–12
C5
38
39
20E–12
M1
39
36
4 4 MN L=9E–6 W=1000E–6 AD=15E–9 AS=15E–9
M2
45
36
4 4 MN L=9E–6 W=1000E–6 AD=15E–9 AS=15E–9
D5
39
47
DX
D6
47
45
DX
Q3
39
40
41
QPA 8
VB
7
40
DC
0.861
R14
7
41
375
Q4
41
7
43
QNA 1
R17
7
43
15
Q5
43
39
6
QNA 20
Q6
46
45
6
QPA 20
R18
46
4
15
Q7
36
46
4
QNA 1
M3
6
36
4 4 MN L = 9E–6 W=2000E–6 AD=30E–9 AS=30E–9
*
* NONLINEAR MODELS USED
*
.MODEL DX D (IS=1E–15)
.MODEL DY D (IS=1E–15 BV=7)
.MODEL PNP1 PNP (BF=220)
.MODEL DEN D(IS=1E–12 RS=1016 K F=3.278E–15 AF=1)
.MODEL DIN D(IS=1E–12 RS=100019 K F=4.173E–15 AF=1)
.MODEL QNA NPN(IS=1.19E–16 BF=253 VAF=193 VAR=15 RB=2.0E3
+ IRB=7.73E–6 RBM=132.8 RE=4 RC=209 CJE=2.1E–13 VJE=0.573
+ MJE=0.364 CJC=1.64E–13 VJC=0.534 MJC=0.5 CJS=1.37E–12
+ VJS=0.59 MJS=0.5 T F=0.43E–9 PT F=30)
.MODEL QPA PNP(IS=5.21E–17 BF=131 VAF=62 VAR= 15 RB=1.52E3
+ IRB=1.67E–5 RBM=368.5 RE=6.31 RC=354.4 CJE=1.1E–13
+ VJE=0.745 MJE=0.33 CJC=2.37E–13 VJC=0.762 MJC=0.4
+ CJS=7.11E–13 VJS=0.45 MJS=0.412 T F=1.0E–9 PT F=30)
.MODEL MN NMOS(LEVEL=3 VT O=1.3 RS=0.3 RD=0.3 T OX =8.5E–8
+ LD=1.48E–6 WD=1E–6 NSUB=1.53E16 UO=650 DELT A=10 VMAX =2E5
+ X J=1.75E–6 K APPA=0.8 ET A=0.066 T HET A=0.01 T PG=1 CJ=2.9E–4
+ PB=0.837 MJ=0.407 CJSW=0.5E–9 MJSW=0.33)
*
.ENDS OP113 Family
60
2
60
0
1.6
0
1.6
9V 9V
+IN
–IN
OUT
Figure 44. OP213 Simplified Schematic
*OP113 Family SPICE Macro-Model
*
9/92, Rev. A
JCN/PMI
*Copyright 1992 by Analog Devices, Inc.
*
*Node Assignments
*
*
Noninverting Input
*
Inverting Input
*
Positive Supply
*
Negative Supply
*
*
.SUBCK T OP113 Family
*
* INPUT ST AGE
R3
4
R4
4
C1
19
I1
7
IOS
2
EOS
12
Q1
19
Q2
20
CIN
3
D1
3
D2
2
EN
5
GN1
0
GN2
0
*
* VOLT AGE NOISE SOURCE WIT H FLICK ER NOISE
DN1
21
22
DEN
DN2
22
23
DEN
VN1
21
0
DC 2
VN2
0
23
DC 2
*
* CURRENT NOISE SOURCE WIT H FLICK ER NOISE
DN3
24
25
DIN
DN4
25
26
DIN
VN3
24
0
DC 2
VN4
0
26
DC 2
*
Output
3
2
7
4
6
19
20
20
18
3
5
3
12
2
1
1
2
2
3
1.5E3
1.5E3
5.31E–12
106E–6
25E–09
POLY(1)
18
18
3E–12
DY
DY
22
25
28
51
4
25E–06
1
PNP1
PNP1
0
0
0
1
1E–5
1E–5
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