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參數(shù)資料
| 型號(hào)： | OP37 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Low Noise, Precision, High Speed Operational Amplifier |
| 中文描述： | 低噪聲，高精度，高速運(yùn)算放大器 |
| 文件頁(yè)數(shù)： | 5/16頁(yè) |
| 文件大小： | 389K |
| 代理商： | OP37 |
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REV. A
OP37
–5–
Wafer Test Limits
OP37NT
Limit
OP37N
Limit
OP37GT
Limit
OP37G
Limit
OP37GR
Limit
Parameter
Symbol
Conditions
Unit
Input Offset
Voltage
Input Offset
Current
Input Bias
Current
Input Voltage
Range
Common Mode
Rejection Ratio
V
OS
Note 1
60
35
200
60
100
μ
V MAX
I
OS
50
35
85
50
75
nA MAX
I
B
±
60
±
40
±
95
±
55
±
80
nA MAX
IVR
±
10.3
±
11
±
10.3
±
11
±
11
V MIN
CMRR
V
CM
=
±
11 V
108
114
100
106
100
dB MIN
Power Supply
Rejection Ratio
PSRR
T
A
= 25
°
C,
V
S
=
±
4 V to
±
18 V
T
A
= 125
°
C,
V
S
=
±
4.5 V to
±
18 V
10
10
10
10
20
μ
V/V MAX
16
20
μ
V/V MAX
Large-Signal
Voltage Gain
A
VO
R
L
≥
2 k
,
V
O
=
±
10 V
R
L
≥
1 k
,
V
O
=
±
10 V
600
1000
500
1000
700
V/mV MIN
800
800
V/mV MIN
Output Voltage
Swing
V
O
R
L
≥
2 k
R
L
≥
600 k
±
11.5
±
12
±
10
±
11
±
12
±
10
±
11.5
±
10
V MIN
V MIN
Power
Consumption
P
d
V
O
= 0
140
140
170
mW MAX
NOTES
For 25
°
C characterlstics of OP37NT and OP37GT devices, see OP37N and OP37G characteristics, respectively.
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
1. NULL
2. (
–
) INPUT
3. (+) INPUT
4. V
–
6. OUTPUT
7. V+
8. NULL
(V
S
= 15 V, T
A
= 25 C for OP37N, OP37G, and OP37GR devices; T
A
= 125 C for OP37NT and OP37GT devices,
unless otherwise noted.)
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
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