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參數(shù)資料
| 型號(hào)： | ON322 |
| 廠商： | AUSTRIAMICROSYSTEMS AG |
| 英文描述： | ON322 is an OR / NAND circuit providing the logical function Q = NOT [ (A+B+C).(D+E).(F+G) ] |
| 中文描述： | ON322是OR / NAND閃存邏輯電路提供函數(shù)Q \u003d不[（ABC）的。（德）。（蛋白原）] |
| 文件頁數(shù)： | 1/2頁 |
| 文件大?。?/td> | 17K |
| 代理商： | ON322 |
ON322 is
an OR
/
NAND circuit providing the logical function Q
=
NOT
[
(A+B+C).(D+E).(F+G)
].
Truth Table
ON322
A
B
C
Q
D
E
F
G
Capacitance
A
B
C
D
E
F
G
Q
Ci (pF)
L
X
X
X
X
X
X
X
X
X
X
H
H
H
H
L
X
X
X
X
X
X
H
H
H
H
X
X
X
X
L
X
X
H
H
H
H
X
X
X
X
X
X
X
X
X
L
X
X
X
H
H
X
X
H
H
X
X
H
H
X
L
X
H
H
X
X
H
H
X
X
H
H
X
X
X
X
L
X
H
X
H
X
H
X
H
X
H
X
H
X
X
L
H
X
H
X
H
X
H
X
H
X
H
X
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
A
B
C
D
E
F
G
0.062
0.063
0.073
0.054
0.061
0.060
0.068
Area
Power
1.08 mils
2
3.79
μW
/
MHz
Delay [ns] = tpd.. = f(SL, L)
Output Slope [ns] = op_sl.. = f(L)
with SL = Input Slope [ns] ; L = Output Load [pF]
with L = Output Load [pF]
AC Characteristics : Tj = 25°C VDD = 3.3V Typical Process
AC Characteristics
Characteristics
Symbol
SL = 0.1
SL = 2.0
L = 0.1
L = 0.7
L = 1.0
L = 0.1
L = 0.7
L = 1.0
Delay A to Q
tpdar
tpdaf
tpdbr
tpdbf
tpdcr
tpdcf
tpddr
tpddf
tpder
tpdef
0.85
0.55
0.85
0.51
0.78
0.45
0.64
0.51
0.62
0.49
2.24
1.43
2.21
1.38
2.14
1.33
1.98
1.42
1.93
1.38
2.91
1.87
2.96
1.81
2.90
1.76
2.57
1.83
2.63
1.79
0.96
0.56
1.00
0.52
1.01
0.46
0.81
0.61
0.89
0.57
2.31
1.41
2.33
1.36
2.32
1.31
2.05
1.44
2.08
1.42
2.97
1.84
2.99
1.79
2.97
1.74
2.68
1.87
2.75
1.84
Delay B to Q
Delay C to Q
Delay D to Q
Delay E to Q
Rev. N/C
Sept. 1996
- 325 -
Austria Mikro Systeme International
R
0.6 μm CMOS
CUB
ON322
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