參數(shù)資料
型號(hào)： OM13005,598
廠商： NXP Semiconductors
文件頁數(shù)： 32/51頁
文件大?。?/td> 0K
描述： BOARD EVAL EM773 METER US PLUG
其它有關(guān)文件： EM773 Energy Metering IC Training
設(shè)計(jì)資源： Plug Meter Schematics, Gerber Files
USB Dongle Schematics, Gerber Files
標(biāo)準(zhǔn)包裝： 1
主要目的： 電源管理，電度表/功率表
嵌入式： 是，MCU，32 位
已用 IC / 零件： EM773FHN33，551
已供物品： 板
相關(guān)產(chǎn)品： 568-5213-ND - IC ENERGY METER ARM 32VQFN
其它名稱： 568-6680
EM773
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 3 January 2012
38 of 51
NXP Semiconductors
EM773
Energy metering IC
[1]
Tcy(clk) = (SSPCLKDIV (1 + SCR) CPSDVSR) / fmain. The clock cycle time derived from the SPI bit rate Tcy(clk) is a function of the
main clock frequency fmain, the SPI peripheral clock divider (SSPCLKDIV), the SPI SCR parameter (specified in the SSP0CR0 register),
and the SPI CPSDVSR parameter (specified in the SPI clock prescale register).
[2]
Tamb = 40 C to 85 C.
[3]
Tcy(clk) = 12 Tcy(PCLK).
[4]
Tamb = 25 C; for normal voltage supply range: VDD = 3.3 V.
SPI slave (in SPI mode)
Tcy(PCLK)
PCLK cycle time
20
-
ns
tDS
data set-up time
in SPI mode
0-
-
ns
tDH
data hold time
in SPI mode
3
T
cy(PCLK) + 4
-
ns
tv(Q)
data output valid time in SPI mode
--
3
T
cy(PCLK) + 11
ns
th(Q)
data output hold time in SPI mode
--
2
T
cy(PCLK) + 5
ns
Table 14.
Dynamic characteristics of SPI pins in SPI mode
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Fig 20. SPI master timing in SPI mode
SCK (CPOL = 0)
MOSI
MISO
Tcy(clk)
tclk(H)
tclk(L)
tDS
tDH
tv(Q)
DATA VALID
th(Q)
SCK (CPOL = 1)
DATA VALID
MOSI
MISO
tDS
tDH
DATA VALID
th(Q)
DATA VALID
tv(Q)
CPHA = 1
CPHA = 0
002aae829
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