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參數(shù)資料
| 型號(hào)： | NWK933TP1N |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | MUSHROOM CAP-YLW OP RoHS Compliant: Yes |
| 中文描述： | 3.3 10/100快速以太網(wǎng)收發(fā)器，以信息產(chǎn)業(yè)部 |
| 文件頁數(shù)： | 9/18頁 |
| 文件大?。?/td> | 141K |
| 代理商： | NWK933TP1N |
9
NWK933
General
The following is the register set that is implemented in the NWK933 device:
The interface to these registers is via the MDC and MDIO signals. The address of the NWK933 is specified by
the PA<4:0> static inputs The MD command is issued by the controller and can be read or write:
command
preamble
start data
op code
phy address
reg number
TA
Data
READ
32 bits of 1
01
10
5 bits
5 bits
Z0
16 bit from phy
WRITE
32 bits of 1
01
01
5 bits
5 bits
10
16 bit from MAC
SC = Self clear
RO = read only
RW = read or write
LL = latch low until register read
LH = latch high until register read
Register Set
reg 0 - control register
Bit
Bit name
Description
Default
R/W
0.15
Reset
1 = PHY reset
0 = Normal operation
0
RW
SC
0.14
Loopback
1 = Loopback mode active
0 = Normal operation
0
RW
0.13
Speed
selection
1 = 100 Mbps
0 = 10 Mbps
1
RW
0.12
ANEG
enable
1 = Enable ANEG process
0 = Disable ANEG process
1
RW
0.11
Power down
1 = Power down active
0 = Normal operation
0
RW
0.10
Isolation
1 = isolation in process
0 = Normal operation
0
RW
0.9
Restart
ANEG
1 = Restart the ANEG process
0 = Normal operation
0
RW
SC
0.8
Duplex
selection
1= Full Duplex mode
0 = Half duplex mode
1
RW
0.7
Collision
test
1 = Collision test active
0 = Normal operation
0
RW
0.6:0
Reserved
Write as 0 ignore on read.
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