參數(shù)資料
型號: NM93CS06LVN
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: PROM
英文描述: CABLE TIE SST .3" 2 500FT. REELS
中文描述: 16 X 16 MICROWIRE BUS SERIAL EEPROM, PDIP8
封裝: PLASTIC, DIP-8
文件頁數(shù): 1/14頁
文件大?。?/td> 201K
代理商: NM93CS06LVN
TL/D/10750
N
2
August 1994
NM93CS06/CS46/CS56/CS66
(MICROWIRE
TM
Bus Interface) 256-/1024-/2048-/4096-Bit
Serial EEPROM with Data Protect and Sequential Read
General Description
The
NM93CS06/CS46/CS56/CS66
1024/2048/4096 bits, respectively, of CMOS non-volatile
electrically erasable memory divided into 16/64/128/
256 16-bit registers. Selected registers can be protected
against data modification by programming the Protect Reg-
ister with the address of the first register to be protected
against data modification (all registers greater than, or equal
to, the selected address are then protected from further
change). Additionally, this address can be ‘‘locked’’ into the
device, making all future attempts to change data impossi-
ble. These devices are fabricated using National Semicon-
ductor floating-gate CMOS process for high reliability, high
endurance and low power consumption. The NM93CSXX
Family is offered in an SO package for small space consid-
erations.
devices
are
256/
The EEPROM interfacing is MICROWIRE compatible pro-
viding simple interfacing to standard microcontrollers and
microprocessors. There are a total of 10 instructions, 5
which operate on the EEPROM memory, and 5 which oper-
ate on the Protect Register. The memory instructions are
READ, WRITE, WRITE ALL, WRITE ENABLE, and WRITE
DISABLE. The Protect register instructions are PRREAD,
PRWRITE, PRENABLE, PRCLEAR, and PRDISABLE.
Features
Y
Write protection in a user defined section of memory
Y
Sequential register read
Y
Typical active current of 400
m
A and standby current of
25
m
A
Y
No erase required before write
Y
Reliable CMOS floating gate technology
Y
MICROWIRE compatible serial I/O
Y
Self timed write cycle
Y
Device status during programming mode
Y
40 year data retention
Y
Endurance: 10
6
data changes
Y
4.5V to 5.5V operation in all modes of operation
Y
Packages available: 8-pin SO, 8-pin DIP
Block Diagram
TL/D/10750–1
TRI-STATE
é
is a registered trademark of National Semiconductor Corporation.
MICROWIRE
TM
is a trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
RRD-B30M75/Printed in U. S. A.
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