參數(shù)資料
型號: NLSF1174
廠商: ON SEMICONDUCTOR
英文描述: Hex D Flip−Flop with Common Clock and Reset
文件頁數(shù): 2/6頁
文件大?。?/td> 87K
代理商: NLSF1174
NLSF1174
http://onsemi.com
2
Figure 2. LOGIC DIAGRAM
D0
D1
D2
D3
D4
D5
Q0
Q1
Q2
Q3
Q4
Q5
CLOCK
RESET
DATA
INPUTS
NONINVERTING
OUTPUTS
DESIGN/VALUE TABLE
Design Criteria
Value
Unit
Internal Gate Count*
40.5
ea
Internal Gate Propagation Delay
1.5
ns
Internal Gate Power Dissipation
5.0
W
Speed Power Product
.0075
pJ
*Equivalent to a twoinput NAND gate.
MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
DC Supply Voltage
(Referenced to GND)
V
CC
0.5 to
7.0
V
DC Input Voltage
(Referenced to GND)
V
IN
1.5 to V
CC
1.5
V
DC Output Voltage
(Referenced to GND) (Note 1)
V
OUT
0.5 to V
CC
0.5
V
DC Input Current, per Pin
I
IN
20
mA
DC Output Current, per Pin
I
OUT
25
mA
DC Supply Current, V
CC
and GND Pins
I
CC
50
mA
Storage Temperature Range
T
STG
65 to
150
°
C
Lead Temperature, 1 mm from Case for 10 Seconds
PDIP, SOIC, TSSOP
T
L
260
°
C
Junction Temperature Under Bias
T
J
150
°
C
Thermal Resistance
QFN
JA
80
°
C/W
Power Dissipation in Still Air at 85
°
C
QFN
P
D
800
mW
Moisture Sensitivity
MSL
Level 1
Flammability Rating
Oxygen Index: 30 to 35
F
R
UL 94 V0 @ 0.125 in
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
V
ESD
2000
100
500
V
Latchup Performance
Above V
CC
and Below GND at 85
°
C (Note 5)
I
LATCHUP
300
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. I
O
absolute maximum rating must be observed.
2. Tested to EIA/JESD22A114A.
3. Tested to EIA/JESD22A115A.
4. Tested to JESD22C101A.
5. Tested to EIA/JESD78.
6. For high frequency or heavy load considerations, see the ON Semiconductor HighSpeed CMOS Data Book (DL129/D).
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