參數(shù)資料
型號(hào): NLAS4051QSR
廠商: ON Semiconductor
文件頁(yè)數(shù): 1/11頁(yè)
文件大?。?/td> 0K
描述: IC MUX/DEMUX 8X1 16QSOP
產(chǎn)品變化通告: Product Obsolescence 20/Sept/2004
標(biāo)準(zhǔn)包裝: 1
功能: 多路復(fù)用器/多路分解器
電路: 1 x 8:1
導(dǎo)通狀態(tài)電阻: 33 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 2.5 V ~ 5 V,±3 V
電流 - 電源: 40µA
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-QSOP
包裝: 剪切帶 (CT)
其它名稱: NLAS4051QSROSCT
Semiconductor Components Industries, LLC, 2006
May, 2006 Rev. 3
1
Publication Order Number:
NLAS4051/D
NLAS4051
Analog Multiplexer/
Demultiplexer
TTL Compatible, SinglePole, 8Position
Plus Common Off
The NLAS4051 is an improved version of the MC14051 and
MC74HC4051 fabricated in submicron Silicon Gate CMOS
technology for lower RDS(on) resistance and improved linearity with
low current. This device may be operated either with a single supply or
dual supply up to
±3.0 V to pass a 6.0 VPP signal without coupling
capacitors.
When operating in single supply mode, it is only necessary to tie
VEE, pin 7 to ground. For dual supply operation, VEE is tied to a
negative voltage, not to exceed maximum ratings.
Features
Improved RDS(on) Specifications
Pin for Pin Replacement for MAX4051 and MAX4051A
One Half the Resistance Operating at 5.0 V
Single or Dual Supply Operation
Single 2.55.0 V Operation, or Dual
±3.0 V Operation
With VCC of 3.0 to 3.3 V, Device Can Interface with 1.8 V
Logic, No Translators Needed
Address and Inhibit Logic are OverVoltage Tolerant and May
Be Driven Up +6.0 V Regardless of VCC
Improved Linearity Over Standard HC4051 Devices
Popular SOIC, and Space Saving TSSOP, and QSOP 16 Pin
Packages
PbFree Packages are Available*
Figure 1. Pin Connection
(Top View)
15
16
14
13
12
11
10
2
1
3
4567
VCC
9
8
NO2
NO4
NO0
NO6 ADDC ADDB ADDA
NO1
NO3 COM
NO7
NO5 Inhibit VEE
GND
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
SOIC16
D SUFFIX
CASE 751B
TSSOP16
DT SUFFIX
CASE 948F
1
16
NLAS4051G
AWLYWW
MARKING
DIAGRAMS
NLAS
4051
ALYW
G
A
= Assembly Location
WL, L
= Wafer Lot
Y
= Year
WW, W = Work Week
G or
G = PbFree Package
ORDERING INFORMATION
Device
Package
Shipping
NLAS4051DR2
SOIC16
2500/Tape & Reel
NLAS4051DTR2
TSSOP16
2500/Tape & Reel
NLAS4051QSR
QSOP16
2500/Tape & Reel
QSOP16
QS SUFFIX
CASE 492
S4051
ALYW
http://onsemi.com
NLAS4051DR2G
SOIC16
(PbFree)
2500/Tape & Reel
NLAS4051DTR2G TSSOP16
(PbFree)
2500/Tape & Reel
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
1
16
1
16
1
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