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NIS1050
http://onsemi.com
3
Table 4. ELECTRICAL CHARACTERISTICS (Unless otherwise noted: Vcc (OVP_sense) = 5.0 V, TJ = 25°C)
Characteristics
Symbol
Min
Typ
Max
Unit
POWER FET
Zero Gate Voltage Drain Current (VDS = 24 Vdc, VGS = 0 V)
TJ = 85°C
IDSS
1.0
10
mA
Gate-to-Source Leakage Current (VDS = 0 V, VGS = ±8 V)
IGSS
100
nA
Gate Threshold Voltage (VGS = VDS, ID = 250 mA)
VGS(th)
0.4
0.7
1.0
V
Negative Gate Threshold Temperature Coefficent
VGS(th)/TJ
2.8
mV/°C
Drain-to-Source On-Resistance (Note
5)VGS = 4.5 V, ID = 2.0 A
VGS = 2.5 V, ID = 2.0 A
RDS(on)
47
56
70
90
mW
Forward Transconductance (VDS = 5 V, ID = 2.0 A)
gFS
4.5
S
Input Capacitance (VDS = 15 Vdc, VGS = 0 Vdc, f = 1 MHz)
CISS
427
pF
Output Capacitance (VDS = 15 Vdc, VGS = 0 Vdc, f = 1 MHz)
COSS
51
pF
Reverse Transfer Capacitance (VDS = 15 Vdc, VGS = 0 Vdc, f = 1 MHz)
CRSS
32
pF
LDO (Unless otherwise noted, TJ = 25°C, Vin = 5.0 V)
Regulated Output Voltage (Vcc = 5.5 V Io = 1 mA)
Vout
4.6
5.0
5.3
V
Response to Input Transient
(Vin 0 to 30 volts, <1 ms rise time, 5.0 kW resistive load, Note
6)Time for signal above 5.5 volts
Peak Voltage
tpulse
Vpk
5.0
9.0
ms
V
Headroom (Vin – Vout, Iout = 1.2 mA, Vin = 4.6 V)
Vhead
150
mV
Headroom (Vin – Vout, Iout = 10 mA, Vin = 4.8 V, TJ = -40 to 125°C)
Vhead
1000
mV
TOTAL DEVICE
Input Bias Current
Ibias
110
850
mA
Minimum Operating Voltage
Vin-min
3.0
V
5. Pulse test: Pulse width 300 ms, duty cycle 2%.
6. Guaranteed by design.