
12
Am386SX/SXL/SXLV Microprocessors Data Sheet
F I N A L
ABSOLUTE MAXIMUM RATINGS
Storage Temperature.......................
–65
°
C to +150
°
C
Ambient Temperature Under Bias ....–65
°
C to +125
°
C
Stresses above those listed may cause permanent
damage to the device. Functionality at or above these
limits is not implied. Exposure to ABSOLUTE MAXI-
MUM RATING conditions for extended periods may af-
fect device reliability.
OPERATING RANGES
Supply Voltage with respect to V
ss
..... –0.5 V to +7.0 V
Voltage on Other Pins................–0.5 V to (V
cc
+0.5) V
Operating ranges define those limits between which
the functionality of the device is guaranteed.
DC CHARACTERISTICS over COMMERCIAL operating ranges for 25 MHz Am386SXLV
V
cc
=3.0 V to 3.6 V; T
CASE
=0
°
C to +100
°
C
V
IH
V
ILC
V
IHC
Input High Voltage
2.0
–
0.3
2.4
V
CC
+0.3
+0.8
V
CC
+0.3
V
V
IL
Input Low Voltage
(Note 1)
–0.3
+0.8
V
C
CLK
CLK2 Capacitance
F
C
= 1 MHz (Note 4)
20
pF
C
OUT
Output Capacitance
F
C
= 1 MHz (Note 4)
12
pF
C
IN
Input or I/O Capacitance
F
C
= 1 MHz (Note 4)
10
pF
I
CCSB
Standby Current (Note 8)
I
CCSB
Typ = 10
μ
A
150
μ
A
V
OH
Output High Voltage
I
OH
= 0.1 mA:
A23–A1, D15–D0
I
OH
= 0.1 mA: BHE, BLE, W/R, D/C, SMIADS,
LOCK, ADS, M/IO, HLDA, SMI
I
OH
= 0.5 mA: A23–A1, D15–D0
I
OH
= 0.5 mA: BHE, BLE, W/R, D/C, SMIADS,
LOCK, ADS, M/IO, HLDA, SMI
Input Leakage Current (All pins except
PEREQ, BUSY, ERROR, SMI, SMIRDY,
FLT, IIBEN)
Input Leakage Current
(PEREQ pin)
Input Leakage Current
(BUSY, ERROR, SMI, SMIRDY, FLT, IIBEN)
(Note 5)
(Note 6)
V
CC
–0.2
V
CC
–0.2
V
V
V
CC
–0.45
V
CC
–0.45
V
V
I
LI
0 V
≤
V
IN
≤
V
CC
(Note 7)
±
10
μ
A
V
OL
Output Low Voltage
I
OL
= 0.5 mA:
A23–A1, D15–D0
I
OL
= 0.5 mA: BHE, BLE, W/R, D/C, SMIADS,
M/IO, LOCK, ADS, HLDA, SMI
I
OL
= 2 mA:
A23–A1, D15–D0
I
OL
= 2.5 mA: BHE, BLE, W/R, D/C, SMIADS,
LOCK, ADS, M/IO, HLDA, SMI
(Note 5)
0.2
0.2
V
V
0.45
0.45
V
V
Symbol
Parameter Description
Notes
Min
Max
Unit
CLK2 Input Low Voltage
CLK2 Input High Voltage
(Note 1)
V
V
I
IH
V
IH
= V
CC
–0.1 V
V
IH
= 2.4 V (Note 2)
V
IL
= 0.1 V
V
IL
= 0.45 V (Note 3)
0.1 V
≤
V
OUT
≤
V
CC
V
CC
= 3.3 V
I
CC
Typ = 95
300
200
–300
–200
μ
A
μ
A
μ
A
μ
A
I
IL
I
LO
I
CC
Output Leakage Current
Supply Current (Note 8)
CLK2 = 50 MHz: Oper. Freq. 25 MHz
+
15
μ
A
V
CC
= 3.6 V
115
mA
Final
Notes:
1.
The Min value, –0.3, is not 100% tested.
2.
PEREQ input has an internal pull-down resistor.
3.
BUSY, ERROR, FLT, SMI, IIBEN, and SMIRDY inputs each have an internal pull-up resistor.
4.
Not 100% tested.
5.
Outputs are CMOS and will pull rail-to-rail if the load is not resistive.
6.
V
OH
SMI only valid on SMI output when exiting SMM for two CLK2 periods.
7.
SMI and IIBEN leakage Low will be I
LI
when pull-up is inactive and I
IL
when pull-up is active.
8.
Inputs at rails (V
CC
or V
SS
).