參數(shù)資料
型號(hào): NE555D
廠商: Fairchild Semiconductor
文件頁數(shù): 13/13頁
文件大?。?/td> 0K
描述: IC OSC MONO TIMING 8-SOP
標(biāo)準(zhǔn)包裝: 8,100
類型: 555 型,計(jì)時(shí)器/振蕩器(單路)
電源電壓: 4.5 V ~ 16 V
電流 - 電源: 7.5mA
工作溫度: 0°C ~ 70°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
包裝: 管件
供應(yīng)商設(shè)備封裝: 8-SOP
安裝類型: 表面貼裝
LM555
Single
T
imer
2002 Fairchild Semiconductor Corporation
www.fairchildsemi.com
LM555 Rev. 1.1.0
9
5. Pulse Position Modulation
If the modulating signal is applied to the control terminal while the timer is connected for the astable operation, as in
Figure 12, the timer becomes a pulse position modulator.
In the pulse position modulator, the reference of the timer's internal comparators is modulated, which modulates the
timer output according to the modulation signal applied to the control terminal.
Figure 13 illustrates a sine wave for modulation signal and the resulting output pulse position modulation; however, any
wave shape be used
.
6. Linear Ramp
When the pull-up resistor RA in the monostable circuit shown in Figure 2 is replaced with constant current source, the
VC1 increases linearly, generating a linear ramp. Figure 14 shows the linear ramp generating circuit and Figure 15 illus-
trates the generated linear ramp waveforms.
Figure 12. Circuit for Pulse Position Modluation
Figure 13. Wafeforms of pulse position modulation
Figure 14. Circuit for Linear Ramp
Figure 15. Waveforms of Linear Ramp
8
4
7
1
2
3
5
6
CONT
GND
Vcc
DISCH
THRES
RESET
TRIG
OUT
+Vcc
R
A
C
R
B
Modulation
Output
1
5
6
7
8
4
2
3
RESET
Vcc
DISCH
THRES
CONT
GND
OUT
TRIG
+Vcc
C2
R1
R2
C1
Q1
Output
RE
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