參數(shù)資料
型號： NE5232D/01,118
廠商： NXP Semiconductors
文件頁數(shù)： 5/10頁
文件大?。?/td> 0K
描述： IC OP AMP DUAL HP 8-SOIC
標準包裝： 2,500
放大器類型： 通用
電路數(shù)： 2
輸出類型： 滿擺幅
轉換速率： 0.8 V/µs
-3db帶寬： 2.5MHz
電流 - 輸入偏壓： 90nA
電壓 - 輸入偏移： 200µV
電流 - 電源： 1.4mA
電流 - 輸出 / 通道： 12mA
電壓 - 電源，單路/雙路(±)： 2 V ~ 5.5 V，±1 V ~ 2.75 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應商設備封裝： 8-SO
包裝： 帶卷 (TR)
其它名稱： 935275251118
NE5232D/01-T
NE5232D/01-T-ND
Philips Semiconductors
Product data
NE/SA/AU5232
Matched dual high-performance
low-voltage operational amplifier
2002 May 21
4
DC ELECTRICAL CHARACTERISTICS
VCC = 2 V to 5.5 V, VEE = 0 V, Tamb = 25 °C; VEE < Vi(CM) < VCC; unless otherwise stated.
TEST CONDITIONS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
NE5232
SA5232
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
VCC = 5.5V
1.4
2.0
1.4
2.0
ICC
Supply current
VCC = 5.5 V;
over full temp. range
1.5
2.3
1.6
2.4
mA
VOS
Offset voltage
±0.2
±4
±0.2
±4
mV
VOS
Offset voltage
Over full temp. range
±0.4
±5
±0.6
±5
mV
VOS/T
Offset voltage drift with
temperature
4
V/°C
VOS
Offset voltage difference
between any amplifiers in
0.4
3
0.4
3
mV
VOS
y
the same package at the
same common mode level1
Over full temp. range
0.8
4
1.2
4
mV
IOS
Offset current
±3
±20
±3
±30
nA
IOS
Offset current
Over full temp. range
±4
±30
±6
±60
nA
IOS/T
Offset current drift with
temperature
0.02
±.3
0.03
±.3
nA/
°C
1
VEE < Vi(CM) < VEE +0.5 V
–200
–90
–200
–90
I
Input bias current1
Over full temp. range
–225
–100
–250
–150
nA
IB
Input bias current1
VEE +1 V < Vi(CM) < VCC
25
70
25
75
nA
Over full temp. range
35
100
35
120
IB/T
Input bias current drift with
temperature
0.5
nA/
°C
Input bias current
VEE < Vi(CM) < VEE +0.5 V
10
30
10
30
IB
difference between any
amplifier in the same
Over full temp. range
25
50
70
nA
amplifier in the same
package at the same
VEE +1 V < Vi(CM) < VCC
5
20
5
20
nA
ackage at the same
common mode level.
Over full temp. range
15
30
25
50
VOS ≤ 6 mV
VEE–0.25
VCC+0.25
VEE–0.25
VCC+0.25
Vi(CM)
Common-mode input range
VOS ≤ 6 mV;
Over full temp. range
VEE–0.1
VCC+0.1
VEE–0.1
VCC+0.1
V
Common-mode rejection
ratio small signal
VEE < Vi(CM) < VEE+0.5V;
VEE+1V < Vi(CM) < VCC
80
100
80
100
CMRR
ratio, small signal
Over full temp. range
75
100
75
dB
Common-mode rejection
VEE < Vi(CM) < VCC
65
90
65
90
j
ratio, large signal
Over full temp. range
60
80
60
PSRR
Power supply rejection
VEE < Vi(CM) < VCC
80
100
80
100
dB
PSRR
yj
ratio
Over full temp. range
80
90
80
90
dB
I
Peak load current, sink and
10
12
10
12
mA
IL
,
source
Over full temp. range
5
8
5
8
mA
A O
Open loop voltage gain
90
110
90
110
dB
AVOL
Open-loop voltage gain
Over full temp. range
90
dB
IPEAK = 0.1 mA
VEE+0.05
VCC–0.05
VEE+0.1
VCC–0.1
Output voltage swing
IPEAK = 10 mA
VEE+0.25
VCC–0.25
VEE+0.25
VCC–0.25
V
VOUT
Out ut voltage swing
IPEAK = 5 mA;
over full temp. range
VEE+0.22
VCC–0.22
VEE+0.2
VCC–0.2
V
Output voltage swing for
RL = 2 k
VEE+0.2
VCC–0.2
VEE+0.2
VCC–0.2
V
gg
VCC = 2.75 V, VEE = –2.75 V
RL = 600
VEE+0.25
VCC–0.25
VEE+0.25
VCC–0.25
V
NOTE:
1. These parameters are measured for VEE < VCM < VEE+0.5 V and for VEE+1 V < VCM < VCC. By design these parameters are intermediate
for common mode ranges between the measured regions.
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