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參數(shù)資料
| 型號(hào)： | NCT1008DMT3R2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 327K |
| 描述： | TMP DIO MON/SMBUS 4CH 8WDFN |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 功能： | 溫度監(jiān)控系統(tǒng)（傳感器） |
| 傳感器類型： | 內(nèi)部和外部 |
| 感應(yīng)溫度： | 0°C ~ 127°C，-64°C ~ 191°C |
| 精確度： | ±2.5°C（最小值） |
| 拓?fù)洌?/td> | ADC（三角積分型），比較器，多路復(fù)用器，寄存器庫 |
| 輸出類型： | I²C?/SMBus? |
| 輸出警報(bào)： | 是 |
| 輸出風(fēng)扇： | 是 |
| 電源電壓： | 2.8 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-WFDFN |
| 供應(yīng)商設(shè)備封裝： | 8-WDFN（2x2） |
| 包裝： | 帶卷 (TR) |
NCT1008
http://onsemi.com
16
Figure 20. Operation of the THERM
and THERM2
Interrupts
THERM2
LIMIT
905C
805C
705C
605C
505C
405C
TEMPERATURE
1
2
3
4
THERM
305C
THERM
LIMIT
THERM2
?SPAN class="pst NCT1008DMT3R2G_2296461_6"> When the THERM2
limit is exceeded, the THERM2
signal asserts low.
?SPAN class="pst NCT1008DMT3R2G_2296461_6"> If the temperature continues to increase and exceeds the
THERM
limit, the THERM
output asserts low.
?SPAN class="pst NCT1008DMT3R2G_2296461_6"> The THERM
output deasserts (goes high) when the
temperature falls to THERM
limit minus hysteresis. In
Figure 20, there is no hysteresis value shown.
?SPAN class="pst NCT1008DMT3R2G_2296461_6"> As the system cools further, and the temperature falls
below the THERM2
limit, the THERM2
signal resets.
Again, no hysteresis value is shown for THERM2
.
Both the external and internal temperature measurements
cause THERM
and THERM2
to operate as described.
Application Information
Noise Filtering
For temperature sensors operating in noisy environments,
the industry standard practice was to place a capacitor across
the D+ and D pins to help combat the effects of noise.
However, large capacitances affect the accuracy of the
temperature measurement, leading to a recommended
maximum capacitor value of 1,000 pF. Although this
capacitor reduces the noise, it does not eliminate it, making
it difficult to use the sensor in a very noisy environment.
The NCT1008 has a major advantage over other devices
when it comes to eliminating the effects of noise on the
external sensor. The series resistance cancellation feature
allows a filter to be constructed between the external
temperature sensor and the part. The effect of any filter
resistance seen in series with the remote sensor is
automatically cancelled from the temperature result.
The construction of a filter allows the NCT1008 and the
remote temperature sensor to operate in noisy environments.
Figure 21 shows a low-pass RCR filter, where R = 100 W
and C = 1 nF. This filtering reduces both common-mode and
differential noise.
Figure 21. Filter Between Remote Sensor and
NCT1008 Factors Affecting Diode Accuracy
100 W
100 W
1 nF
D+
D
REMOTE
TEMPERATURE
SENSOR
Remote Sensing Diode
The NCT1008 is designed to work with substrate
transistors built into processors or with discrete transistors.
Substrate transistors are generally PNP types with the
collector connected to the substrate. Discrete types are either
PNP or NPN transistors connected as diodes (base-shorted
to collector). If an NPN transistor is used, the collector and
base are connected to D+ and the emitter to D. If a PNP
transistor is used, the collector and base are connected to D
and the emitter to D+.
To reduce the error due to variations in both substrate and
discrete transistors, consider several factors:
?SPAN class="pst NCT1008DMT3R2G_2296461_6"> The ideality factor, nF, of the transistor is a measure of
the deviation of the thermal diode from ideal behavior.
The NCT1008 is trimmed for an nF value of 1.008. The
following equation may be used to calculate the error
introduced at a temperature, T (癈), when using a
transistor whose nF does not equal 1.008. Consult the
processor data sheet for the nF values.
DT = (nF 1.008)/1.008 ?(273.15 Kelvin + T)
To factor this in, the user writes the DT value to the offset
register. It is then automatically added to, or subtracted
from, the temperature measurement.
?SPAN class="pst NCT1008DMT3R2G_2296461_6"> Some CPU manufacturers specify the high and low
current levels of the substrate transistors. The high
current level of the NCT1008, I
HIGH
, is 220 mA and the
low level current, I
LOW
, is 13.5 mA. If the NCT1008
current levels do not match the current levels specified
by the CPU manufacturer, it may become necessary to
remove an offset. The CPU data sheet should advise
whether this offset needs to be removed and how to
calculate it. This offset is programmed to the offset
register. It is important to note that if more than one
offset must be considered, the algebraic sum of these
offsets must be programmed to the offset register.
If a discrete transistor is used with the NCT1008, the best
accuracy is obtained by choosing devices according to the
following criteria:
?SPAN class="pst NCT1008DMT3R2G_2296461_6"> Base-emitter voltage greater than 0.25 V at 6 mA, at the
highest operating temperature
?SPAN class="pst NCT1008DMT3R2G_2296461_6"> Base-emitter voltage less than 0.95 V at 100 mA, at the
lowest operating temperature
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