參數(shù)資料
型號: NCP562SQ30
廠商: ON SEMICONDUCTOR
元件分類: 基準電壓源/電流源
英文描述: 80 mA CMOS Low Iq Low-Dropout Voltage Regulator(80 mA CMOS 低靜態(tài)電流低壓差電壓穩(wěn)壓器)
中文描述: 80毫安CMOS低智商低壓差穩(wěn)壓器(80毫安的CMOS低靜態(tài)電流低壓差電壓穩(wěn)壓器)
文件頁數(shù): 7/12頁
文件大?。?/td> 64K
代理商: NCP562SQ30
NCP562, NCP563
http://onsemi.com
7
APPLICATIONS INFORMATION
A typical application circuit for the NCP562 and NCP563
series are shown in Figure 1 and Figure 2.
Input Decoupling (C1)
A 1.0
recommended and should be connected close to the NCP562
package. Higher values and lower ESR will improve the
overall line transient response.
TDK capacitor: C2012X5R1C105K, or C1608X5R1A105K
F capacitor either ceramic or tantalum is
Output Decoupling (C2)
The NCP562 and NCP563 are very stable regulators and
do not require any specific Equivalent Series Resistance
(ESR) or a minimum output current. Capacitors exhibiting
ESRs ranging from a few m
up to 10
can thus safely be
used. The minimum decoupling value is 0.1 F and can be
augmented to fulfill stringent load transient requirements.
The regulator accepts ceramic chip capacitors as well as
tantalum devices. Larger values improve noise rejection and
load regulation transient response.
TDK capacitor: C2012X5R1C105K, C1608X5R1A105K,
or C3216X7R1C105K
Enable Operation (NCP562 ONLY)
The enable pin will turn on the regulator when pulled high
and turn off the regulator when pulled low. These limits of
threshold are covered in the electrical specification section
of this data sheet. If the enable is not used, then the pin
should be connected to V
in
.
Hints
Please be sure the Vin and Gnd lines are sufficiently wide.
When the impedance of these lines is high, there is a chance
to pick up noise or cause the regulator to malfunction.
Place external components, especially the output
capacitor, as close as possible to the circuit, and make leads
as short as possible.
Thermal
As power across the NCP562 and NCP563 increases, it
might become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material and also the
ambient temperature effect the rate of temperature rise for
the part. This is stating that when the devices have good
thermal conductivity through the PCB, the junction
temperature will be relatively low with high power
dissipation applications.
The maximum dissipation the package can handle is
given by:
TJ(max)
PD
TA
RJA
If junction temperature is not allowed above the
maximum 125
°
C, then the NCP562 and NCP563 can
dissipate up to 250 mW @ 25
°
C.
The power dissipated by the NCP562 and NCP563 can be
calculated from the following equation:
Ptot
[Vin* Ignd(Iout)]
or
[Vin
Vout] * Iout
VinMAX
Ptot
Vout*Iout
Ignd
Iout
If an 80 mA output current is needed then the ground
current from the data sheet is 2.5 A. For an NCP562 or
NCP563 (3.0 V), the maximum input voltage will then be
6.0 V.
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