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參數(shù)資料
| 型號(hào)： | NCP5423DR2G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Dual Out−of−Phase Synchronous Buck Controller with Current Limit |
| 中文描述： | 1.5 A DUAL SWITCHING CONTROLLER, 750 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | LEAD FREE, SOP-16 |
| 文件頁(yè)數(shù)： | 11/16頁(yè) |
| 文件大?。?/td> | 171K |
| 代理商： | NCP5423DR2G |
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NCP5422A, NCP5423
http://onsemi.com
11
where:
I
L(VALLEY)
= inductor valley current.
Input Capacitor Selection
The choice and number of input capacitors is determined
by their voltage and ripple current ratings. The designer
must choose capacitors that will support the worst case input
voltage with an adequate margin. To calculate the number of
input capacitors one must first determine the RMS ripple
current through the capacitors. To this end, first calculate the
average input current to the converter:
V1· I1
V2· I2
· Vin
With the average input current determined, the RMS
ripple current through the input capacitor will be:
Iin(Avg)
where
efficiency (typical
is the expected
85%)
Irms
Io12
Ip12
3
· D1
Io22
Ip22
3
· D2Iin2
where:
I
o1,2
is the maximum DC output current for channel 1 and
2 respectively.
I
p1,2
is the peak inductor current (1/2 I
L
) for channel’s
1 and 2 respectively. If the channel peak inductor current
is less than 50% of the channel output current it may be
neglected.
D
1,2
is the channel duty cycle. Here it is assumed that each
channel’s duty cycle is less than 50% so that each phase
does not overlap.
Once the RMS ripple current has been determined, the
required number of input capacitor’s needed is based on the
rated RMS ripple current rating of the chosen capacitor.
Selection of the Output Capacitors
These components must be selected and placed carefully
to yield optimal results. Capacitors should be chosen to
provide acceptable ripple on the regulator output voltage.
Key specifications for output capacitors are their ESR
(Equivalent Series Resistance), and ESL (Equivalent Series
Inductance). For best transient response, a combination of
low value/high frequency and bulk capacitors placed close
to the load will be required.
In order to determine the number of output capacitors the
maximum voltage transient allowed during load transitions
has to be specified. The output capacitors must hold the
output voltage within these limits since the inductor current
can not change with the required slew rate. The output
capacitors must therefore have a very low ESL and ESR.
The voltage change during the load current transient is:
VOUT
IOUT
ESL
t
ESR
tTR
COUT
where:
I
OUT
/ t = load current slew rate;
I
OUT
= load transient;
t = load transient duration time;
ESL = Maximum allowable ESL including capacitors,
circuit traces, and vias;
ESR = Maximum allowable ESR including capacitors
and circuit traces;
t
TR
= output voltage transient response time.
The designer has to independently assign values for the
change in output voltage due to ESR, ESL, and output
capacitor discharging or charging. Empirical data indicates
that most of the output voltage change (droop or spike
depending on the load current transition) results from the
total output capacitor ESR.
The maximum allowable ESR can then be determined
according to the formula:
ESRMAX
VESR
IOUT
where:
V
ESR
= change in output voltage due to ESR (assigned
by the designer)
Once the maximum allowable ESR is determined, the
number of output capacitors can be found by using the
formula:
Number of capacitors
ESRCAP
ESRMAX
where:
ESR
CAP
= maximum ESR per capacitor (specified in
manufacturer’s data sheet).
ESR
MAX
= maximum allowable ESR.
The actual output voltage deviation due to ESR can then
be verified and compared to the value assigned by the
designer:
VESR
IOUT
Similarly, the maximum allowable ESL is calculated from
the following formula:
ESRMAX
ESLMAX
VESL
t
I
Selection of the Input Inductor
A common requirement is that the buck controller must
not disturb the input voltage. One method of achieving this
is by using an input inductor and a bypass capacitor. The
input inductor isolates the supply from the noise generated
in the switching portion of the buck regulator and also limits
the inrush current into the input capacitors upon power up.
The inductor’s limiting effect on the input current slew rate
becomes increasingly beneficial during load transients. The
worst case is when the load changes from no load to full load
(load step), a condition under which the highest voltage
change across the input capacitors is also seen by the input
inductor. The inductor successfully blocks the ripple current
while placing the transient current requirements on the input
bypass capacitor bank, which has to initially support the
sudden load change.
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| NCP5424AD | 功能描述:IC REG CTRLR BUCK PWM 16-SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標(biāo)準(zhǔn)包裝:4,000 系列:- PWM 型:電壓模式 輸出數(shù):1 頻率 - 最大:1.5MHz 占空比:66.7% 電源電壓:4.75 V ~ 5.25 V 降壓:是 升壓:無(wú) 回掃:無(wú) 反相:無(wú) 倍增器:無(wú) 除法器:無(wú) Cuk:無(wú) 隔離:無(wú) 工作溫度:-40°C ~ 85°C 封裝/外殼:40-VFQFN 裸露焊盤 包裝:帶卷 (TR) |
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