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參數(shù)資料
| 型號(hào)： | NCP5306DW |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Three−Phase VRM 9.0 Buck Controller |
| 中文描述： | 0.1 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO24 |
| 封裝： | SOP-24 |
| 文件頁數(shù)： | 7/24頁 |
| 文件大?。?/td> | 879K |
| 代理商： | NCP5306DW |
NCP5306
http://onsemi.com
7
ELECTRICAL CHARACTERISTICS (continued)
(0
°
C < T
A
< 70
°
C; 0
°
C < T
J
< 125
°
C; 9.5 V < V
CC
< 14 V; C
GATEx
= 100 pF,
C
COMP
= 0.01
μ
F, C
SS
= 0.1
μ
F, C
VCC
= 0.1
μ
F, R
ROSC
= 32.4 k
Ω
, V
OCSET
= 0.54 V, DAC Code 01110; unless otherwise stated.)
Parameter
Unit
Max
Typ
Min
Test Conditions
Current Sense Amplifiers
OCSET Input Bias Current
OCSET = 0 V
0.1
1.0
μ
A
Current Sense Input to OCSET
Gain
OCSET/(CSx
CS
REF
), 0.25 V <
OCSET < 0.6 V, GATEx not
switching
3.2
3.7
4.3
V/V
Current Limit Filter Slew Rate
CS
REF
= 1.1 V, CSx = 1.0 V, pulse
CSx to 1.16 V, Note 5.
2.0
5.0
13
mV/
μ
s
General Electrical Specification
V
CC
Operating Current
COMP = 0.3 V (no switching)
20
30
mA
UVLO Start Threshold
SS Charging Gates Switching
8.5
9.0
9.5
V
UVLO Stop Threshold
Gates not switching, SS & COMP
discharging
7.5
8.0
8.5
V
UVLO Hysteresis
Start
Stop
0.8
1.0
1.2
V
5. Guaranteed by design. Not tested in production.
PACKAGE PIN DESCRIPTION
Pin Number
Pin Symbol
Pin Name
Function
1
GND
Ground
IC power supply return. Connected to IC substrate.
2
OCSET
Overcurrent Set
Resistor divider from R
OSC
to GND. Programs the threshold of the hiccup
overcurrent protection.
3
R
OSC
Oscillator Frequency
Adjust
R
OSC
is a regulated 1.0 V output and programs the oscillator frequency
with a resistor to GND.
4
6
CS3
CS1
Current Sense Inputs
Non
inverting inputs to the current sense amplifiers.
7, 20
NC
No Connect
Pins not connected to IC.
8
CS
REF
Current Sense Reference
Inverting input to the current sense amplifiers and reference for Power Good.
9
V
DRP
Current Sense Amp
Output
Programs the voltage drop due to loading. A resistor from V
DRP
to FB
programs the amount of Adaptive Voltage Positioning. Omitting this
resistor defeats the AVP function.
10
V
FB
Voltage Feedback
Error Amplifier inverting input. Input bias current is used to program AVP
light load offset via a resistor connected to the converter output voltage.
11
COMP
Error Amp Output and
PWM Comparator Input
Provides loop compensation and is clamped by SS.
12
SS
Soft Start
Controls fault timing and startup.
13
PWRGD
Power Good Output
Open collector output, which is “l(fā)ow” when the converter output is out of
regulation.
14
PWRGDS
Power Good Sense
A resistor divider from V
OUT
to GND programs the Power Good lower
threshold.
15
19
V
ID4
V
ID0
DAC V
ID
Inputs
TTL
compatible logic input used to program the converter output voltage.
Internal 50 k
Ω
pull
ups to 3.3 V via a blocking diode are provided. All high
generates fault.
21
23
GATE3
1
Channel Outputs
PWM outputs to drive FET driver IC.
24
V
CC
Supply Input
IC bias input.
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