NCP5306
http://onsemi.com
18
+
+
Vi
12 V
Li
TBD
N
Ci
×
Ci
ESR
Ci
/N
Ci
Q2
Q1
Lo
ESR
Co
/N
Co
14 u(t)
N
Co
×
Co
Vi(t = 0) = 12 V
SWNODE
Vo(t = 0) = 1.745 V
V
Ci
I
Lo
V
OUT
I
Li
MAX dI/dt occurs in
first few PWM cycles.
Figure 22. Calculating the Input Inductance
+
4. Input Inductor Selection
The use of an inductor between the input capacitors and
the power source will accomplish two objectives. First, it
will isolate the voltage source and the system from the noise
generated in the switching supply. Second, it will limit the
inrush current into the input capacitors at power up. Large
inrush currents reduce the expected life of the input
capacitors. The inductor’s limiting effect on the input
current slew rate becomes increasingly beneficial during
load transients.
The worst case input current slew rate will occur during
the first few PWM cycles immediately after a step
load
change is applied as shown in Figure 22. When the load is
applied, the output voltage is pulled down very quickly.
Current through the output inductors will not change
instantaneously, so the initial transient load current must be
conducted by the output capacitors. The output voltage will
step downward depending on the magnitude of the output
current (I
O,MAX
), the per capacitor ESR of the output
capacitors (ESR
OUT
) and the number of the output
capacitors (N
OUT
) as shown in Figure 22. Assuming the load
current is shared equally between the three phases, the
output voltage at full transient load will be:
VOUT,FULL
LOAD
VOUT,NO
LOAD
(14)
(IO,MAX3)
ESROUTNOUT
When the control MOSFET (Q1 in Figure 22) turns ON,
the input voltage will be applied to the opposite terminal of
the output inductor (the SWNODE). At that instant, the
voltage across the output inductor can be calculated as:
VLo
VIN
VIN
VOUT,FULL
LOAD
VOUT,NO
LOAD
(IO,MAX3)
(15)
ESROUTNOUT
The differential voltage across the output inductor will
cause its current to increase linearly with time. The slew rate
of this current can be calculated from:
dILodt
VLoLo
(16)
Current changes slowly in the input inductor so the input
capacitors must initially deliver the vast majority of the
input current. The amount of voltage drop across the input
capacitors (
Δ
V
Ci
) is determined by the number of input
capacitors (N
IN
), their per capacitor ESR (ESR
IN
) and the
current in the output inductor according to:
VCi
ESRINNIN
ESRINNIN
dILodt
dILodt
tON
D fSW
(17)
Before the load is applied, the voltage across the input
inductor (V
Li
) is very small and the input capacitors charge
to the input voltage V
IN
. After the load is applied, the voltage
drop across the input capacitors,
Δ
V
Ci
, appears across the
input inductor as well. Knowing this, the minimum value of
the input inductor can be calculated from:
LiMIN
VLi
VCi
dIINdtMAX
dIINdtMAX
(18)
dI
IN
/dt
MAX
is the maximum allowable input current slew
rate.
The input inductance value calculated from Equation 18
is relatively conservative. It assumes the supply voltage is
very “stiff” and does not account for any parasitic elements
that will limit dI/dt such as stray inductance. Also, the ESR
values of the capacitors specified by the manufacturer’s data
sheets are worst case high limits. In reality, input voltage
“sag,” lower capacitor ESRs and stray inductance will help
reduce the slew rate of the input current.