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參數(shù)資料
| 型號(hào)： | NCP5181DR2G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類(lèi)： | 通用總線功能 |
| 英文描述： | High Voltage High and Low Side Driver |
| 中文描述： | LINE DRIVER, PDSO8 |
| 封裝： | LEAD FREE, SOIC-8 |
| 文件頁(yè)數(shù)： | 4/12頁(yè) |
| 文件大?。?/td> | 104K |
| 代理商： | NCP5181DR2G |
NCP5181
http://onsemi.com
4
ELECTRICAL CHARACTERISTICS
(V
CC
= V
boot
= 15 V, V
gnd
= V
bridge
, 40
°
C < T
A
< 125
°
C, Outputs loaded with 1 nF)
Rating
Symbol
T
A
40
°
C to 125
°
C
Units
OUTPUT SECTION
Min
Typ
Max
Output high short circuit pulsed current
V
DRV
= 0 V, PW
≤
10 s, (Note 1)
I
DRVhigh
1.4
A
Output low short circuit pulsed current
V
DRV
= V
CC
, PW
≤
10 s, (Note 1)
I
DRVlow
2.2
A
Output resistor (Typical value @ 25
°
C only)
Source
R
OH
5
12
Output resistor (Typical value @ 25
°
C only)
Sink
R
OL
2
8
DYNAMIC OUTPUT SECTION
Rating
Symbol
Min
Typ
Max
Units
Turnon propagation delay (V
bridge
= 0 V)
t
ON
100
170
ns
Turnoff propagation delay (V
bridge
= 0 V or 50 V) (Note 2)
t
OFF
100
170
ns
Output voltage rise time
(from 10% to 90% @ V
CC
= 15 V) with 1 nF load
t
r
40
60
ns
Output voltage falling edge
(from 90% to 10% @ V
CC
= 15 V) with 1 nF load
t
f
20
40
ns
Propagation delay matching between the High side and the Low side
@ 25
°
C (Note 3)
t
20
35
ns
Minimum input pulse width that changes the output
t
PW
100
ns
INPUT SECTION
Low level input voltage threshold
V
IN
0.8
V
Input pulldown resistor (V
IN
< 0.5 V)
R
IN
200
k
High level input voltage threshold
V
IN
2.3
V
SUPPLY SECTION
V
CC
UV Startup voltage threshold
V
CC_stup
7.9
8.9
9.8
V
V
CC
UV Shutdown voltage threshold
V
CC_shtdwn
7.3
8.2
9.0
V
Hysteresis on V
CC
V
CC_hyst
0.3
0.7
V
V
boot
Startup voltage threshold reference to bridge pin
(V
boot_stup
= V
boot
V
bridge
)
V
boot_stup
7.9
8.9
9.8
V
V
boot
UV Shutdown voltage threshold
V
boot_shtdwn
7.3
8.2
9.0
V
Hysteresis on V
boot
V
boot_shtdwn
0.3
0.7
V
Leakage current on high voltage pins to GND
(V
BOOT
= V
BRIDGE
= DRV_HI = 600 V)
I
HV_LEAK
0.5
40
A
Consumption in active mode
(V
CC
= V
boot
, f
sw
= 100 kHz and 1 nF load on both driver outputs)
I
CC1
4.5
6.5
mA
Consumption in inhibition mode (V
CC
= V
boot
)
I
CC2
250
400
A
V
CC
current consumption in inhibition mode
I
CC3
215
A
V
boot
current consumption in inhibition mode
*Note: see also characterization curves
1. Guaranteed by design.
2. Turnoff propagation delay @ V
bridge
= 600 V is guaranteed by design
3. See characterization curve for
4. Timing diagram definition see Figures 4, 5 and 6.
I
CC4
35
A
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