參數(shù)資料
型號: NCP303LSN41T1
廠商: ON SEMICONDUCTOR
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5
封裝: SC-59, TSOT-23, TSOP-5
文件頁數(shù): 15/28頁
文件大小: 199K
代理商: NCP303LSN41T1
NCP302, NCP303
http://onsemi.com
22
Figure 46. MultiRail Supply Undervoltage Monitor with Power Good
*
R1 is Optional CD Pin Pullup
3.3 V Power Supply 2
(I/O Subsystem)
VIN
0 V
VTCD
CD Pin
Note: VTCD 0.675 * VIN
tD2
2
1
5
3
Reset Output
Input
CD
GND
NCP302L
Series
2
1
3
Reset Output
Input
GND
2
1
3
Reset Output
Input
GND
NCP301
LSN30T1
NCP301
LSN45T1
CD
5.0 V Power Supply 3
(Peripheral Subsystem)
Power Supply 1
(System Core)
R1
RP
*Required for
NCP303
To MCU or
Logic Circuitry
0 V
tD2
Power Supply 1
Power Supply 2
VP
Power Supply 3
NCP302L
RESET Output
This circuit monitors multiple power supply rails for
undervoltage conditions. If any of the three power supplies
are in an undervoltage condition, the NCP302 reset output
will be immediately set to an active low level. All three
power supplies must be above their minimum voltage levels
for the NCP302 reset output to generate a “Power Good”
level (Reset Output = Power Supply 1 or VP).
Optionally, R1 may be added to provide a smaller
effective
CD pin pullup resistance, (RD’), where
RD’ = R1 || RD, with RD (internal CD pin pullup resistance)
approximately equal to 1.0 M
W, and R1 > 5 kW. If R1 << RD,
then R1 also can decrease the reset output delay time (tD2)
variance over the operating temperature range.
The Power Good signal time delay (tD2) can be estimated
by: tD2
≈ RD * CD, with RD in Ohms, and CD in Farads. If
R1 is installed, then RD’ is substituted for RD. RP is added
only if using the NCP303 to replace the NCP302. This
allows the Reset Output to be pulled up to VP, which can be
the Power Supply 1 or an independent power supply rail.
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