參數(shù)資料
型號: NCP1501DMR2G
廠商: ON Semiconductor
文件頁數(shù): 9/14頁
文件大小: 359K
描述: IC REG SGL BUCK/LINEAR 8MICRO
產(chǎn)品變化通告: Product Obsolescence 01/Jul/2009
標(biāo)準(zhǔn)包裝: 1
拓?fù)洌?/td> 降壓(降壓)(1),線性(LDO)(1)
功能: 任何功能
輸出數(shù): 1
頻率 - 開關(guān): 500kHz ~ 1MHz
電壓/電流 - 輸出 1: 1.05V,1.35V,1.57V,1.8V,-
帶 LED 驅(qū)動器:
帶監(jiān)控器:
帶序列發(fā)生器:
電源電壓: 2.7 V ~ 5.2 V
工作溫度: -30°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: Micro8?
包裝: 剪切帶 (CT)
其它名稱: NCP1501DMR2GOSCT
NCP1501
http://onsemi.com
9
APPLICATIONSINFORMATION
NCP1501 is a dual mode PWM or LDO step down
converter.Thisdualmodetakesadvantageofthebestof
eachmode.Therearethreerequiredexternalcomponents:
aninputandoutputcapacitorandaninductor.
ThePWMmodeallowshighefficiencyforlargerloads.
Atypicalefficiencyforaninputof3.6Vandanoutputof
1.8V and 100mA is over 90%. Low R
DSon
and
synchronous rectification contained within the device
contributes to the very high efficiency. As with other
synchronousrectificationdevices,theNCP1501doesnot
requireanexternaldiodetosupplementtheNFETduring
switchingonoroff.Asynchronizationpinallowstheuser
todefinethefrequencynoisespikesofthePWM.Theduty
cycleofthesynchronizationsignalmustbewithintherange
of 30% to 70%. The rising edge of the signal from the
synchronizationpinactsastheoscillatorsignaltosetthe
latch and reset the ramp compensation signal. An Over
VoltageProtectioncircuitensurestheoutputwillrespond
properlytofasttransientsfromlargetosmallloads.The
NCP1501allowsthePWMmodetoentera100%dutycycle
forfastloadtransientconditionsandlowinputtooutput
voltagedifferentials.
TheLDOmodeiseffectiveduringlowloadconditionsby
lowering the quiescent current and reducing the output
ripplevoltageassociatedwithPWMconvertersentering
PFM mode. NCP1501 enters the LDO mode when a
synchronizationsignalisnotpresent.Itisrecommendedto
pullthesynchronizationsignallowforLDOmode.
Figure9.TypicalOperatingSchematic
C
out
NCP1501
8
7
6
5
1
2
3
4
SHD
SYN
V
O
LX
CB0
CB1
GND
V
in
C
in
10mH
L
10m
10m
V
bat
V
out
C
in
,C
out
:10mFCeramic,
C2012X5R0J106M(TDK)
L:10mH,LLF4017--100(TDK)
Figure10.InputCurrentversusVoltageforthe
ShutdownPin
5
4
3
2
1
0
V
SHD
(V)
2.5
2
1.5
1
0.5
0
V
CC
=3.6V
T
A
=25癈
Figure11.InputCurrentversusVoltageforthe
SynchronizationPin
4
3
2
1
0
V
SYN
(V)
2
1.8
1.2
1
0.2
0
V
CC
=3.6V
T
A
=25癈
0.4
0.6
0.8
1.4
1.6
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