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參數(shù)資料
| 型號(hào)： | NC7WZU04P6X_F065 |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 7/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC INVERTER DUAL UNBUFF SC70-6 |
| 產(chǎn)品變化通告： | Mold Compound Change 12/Dec/2007 |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 系列： | 7WZU |
| 邏輯類型： | 反相器 |
| 電路數(shù)： | 2 |
| 輸入數(shù)： | 1 |
| 電源電壓： | 1.8 V ~ 5.5 V |
| 電流 - 靜態(tài)（最大值）： | 1µA |
| 輸出電流高，低： | 8mA，8mA |
| 額定電壓和最大 CL 時(shí)的最大傳播延遲： | 5.6ns @ 5V，50pF |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 供應(yīng)商設(shè)備封裝： | SC-70-6 |
| 封裝/外殼： | 6-TSSOP，SC-88，SOT-363 |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | Q3698330 |
2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
NC7WZU04 Rev. 1.0.4
5
NC7WZU04
—
Tin
yLogic
UHS
Dual
Unb
uff
ered
In
ver
ter
AC Electrical Characteristics
Note:
2. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current
consumption (ICCD) at no output loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD
dynamic operating current by the expression:
ICCD = (CPD)(VCC)(fIN) + (ICCstatic).
AC Loading and Waveforms
Symbol
Parameter
VCC (V)
Conditions
TA =
Units
Figure
Number
+25C
–40°C to +85°C
Min.
Typ.
Max.
Min.
Max.
tPLH, tPHL Propagation Delay
1.65
CL = 15pF,
RL = 1M
1.5
5.5
9.8
1.5
11.0
ns
Figure 1
Figure 3
1.8
1.5
4.6
8.1
1.5
8.9
2.5 ± 0.2
1.2
3.3
5.7
1.2
6.3
3.3 ± 0.3
0.8
2.7
4.1
0.8
4.5
5.0 ± 0.5
0.5
2.2
3.3
0.5
3.6
3.3 ± 0.3
CL = 50pF,
RL = 500,
1.2
4.0
6.4
1.2
7.0
ns
Figure 1
Figure 3
5.0 ± 0.5
0.8
3.4
5.6
0.8
6.2
CIN
Input Capacitance
0
3
pF
CPD
Power Dissipation
Capacitance
3.3
Note 2
3.5
pF
Figure 2
5.0
5.5
tr = 3ns
Input
Output
tPLH
Input
Output
Figure 3. AC Waveforms
Figure 1. AC Test Circuit
Figure 2. ICCD Test Circuit
tf = 3ns
VOH
90%
50%
90%
10%
50%
tPHL
tW
VOL
VCC
GND
RL
CL*
VCC
*CL includes load and stray capacitance.
Input PRR = 1.0MHz; tW = 500ns
A
Input
Application Note: When operating the NC7WZU04’s
unbuffered output stage in its linear range, as in oscillator
applications, care must be taken to observe maximum power
rating for the device and package. The high drive nature of
the design of the output stage will result in substantial simultaneous
conduction currents when the stage is in the linear region. See
the ICCPEAK specification on page 2.
Input = AC Waveform; tr, tf = 1.8ns;
PRR = 10MHz; Duty Cycle = 50%
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